+++ /dev/null
-From 0d3a1beecfa54b938edf3ed046902f072e1e180a Mon Sep 17 00:00:00 2001
-From: Zhao Yakui <yakui.zhao@intel.com>
-Date: Mon, 19 Jul 2010 09:43:13 +0100
-Subject: drm/i915: Always use the fixed panel timing for eDP
-
-From: Zhao Yakui <yakui.zhao@intel.com>
-
-commit 0d3a1beecfa54b938edf3ed046902f072e1e180a upstream.
-
-Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 2b99ab2..233e6fd 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -511,11 +511,37 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
- {
- struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
- struct intel_dp_priv *dp_priv = intel_encoder->dev_priv;
-+ struct drm_device *dev = encoder->dev;
-+ struct drm_i915_private *dev_priv = dev->dev_private;
- int lane_count, clock;
- int max_lane_count = intel_dp_max_lane_count(intel_encoder);
- int max_clock = intel_dp_max_link_bw(intel_encoder) == DP_LINK_BW_2_7 ? 1 : 0;
- static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 };
-
-+ if ((IS_eDP(intel_encoder) || IS_PCH_eDP(dp_priv)) &&
-+ dev_priv->panel_fixed_mode) {
-+ struct drm_display_mode *fixed_mode = dev_priv->panel_fixed_mode;
-+
-+ adjusted_mode->hdisplay = fixed_mode->hdisplay;
-+ adjusted_mode->hsync_start = fixed_mode->hsync_start;
-+ adjusted_mode->hsync_end = fixed_mode->hsync_end;
-+ adjusted_mode->htotal = fixed_mode->htotal;
-+
-+ adjusted_mode->vdisplay = fixed_mode->vdisplay;
-+ adjusted_mode->vsync_start = fixed_mode->vsync_start;
-+ adjusted_mode->vsync_end = fixed_mode->vsync_end;
-+ adjusted_mode->vtotal = fixed_mode->vtotal;
-+
-+ adjusted_mode->clock = fixed_mode->clock;
-+ drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
-+
-+ /*
-+ * the mode->clock is used to calculate the Data&Link M/N
-+ * of the pipe. For the eDP the fixed clock should be used.
-+ */
-+ mode->clock = dev_priv->panel_fixed_mode->clock;
-+ }
-+
- for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) {
- for (clock = 0; clock <= max_clock; clock++) {
- int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count);
--- /dev/null
+From 211824241d170fa9a3fae706cc4fa411c3e9ad6e Mon Sep 17 00:00:00 2001
+From: Greg Kroah-Hartman <gregkh@suse.de>
+Date: Fri, 6 Aug 2010 10:22:56 -0700
+Subject: Revert "ssb: Handle Netbook devices where the SPROM address is changed"
+
+From: Greg Kroah-Hartman <gregkh@suse.de>
+
+Turns out this isn't the best way to resolve this issue. The
+individual patches will be applied instead.
+
+Cc: Larry Finger <Larry.Finger@lwfinger.net>
+Cc: Ben Hutchings <ben@decadent.org.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/ssb/driver_chipcommon.c | 3 -
+ drivers/ssb/driver_chipcommon_pmu.c | 17 ++++++-----
+ drivers/ssb/pci.c | 46 +++---------------------------
+ drivers/ssb/sprom.c | 15 ---------
+ include/linux/ssb/ssb.h | 1
+ include/linux/ssb/ssb_driver_chipcommon.h | 2 -
+ include/linux/ssb/ssb_regs.h | 3 -
+ 7 files changed, 17 insertions(+), 70 deletions(-)
+
+--- a/drivers/ssb/driver_chipcommon.c
++++ b/drivers/ssb/driver_chipcommon.c
+@@ -233,9 +233,6 @@ void ssb_chipcommon_init(struct ssb_chip
+ {
+ if (!cc->dev)
+ return; /* We don't have a ChipCommon */
+- if (cc->dev->id.revision >= 11)
+- cc->status = chipco_read32(cc, SSB_CHIPCO_CHIPSTAT);
+- ssb_dprintk(KERN_INFO PFX "chipcommon status is 0x%x\n", cc->status);
+ ssb_pmu_init(cc);
+ chipco_powercontrol_init(cc);
+ ssb_chipco_set_clockmode(cc, SSB_CLKMODE_FAST);
+--- a/drivers/ssb/driver_chipcommon_pmu.c
++++ b/drivers/ssb/driver_chipcommon_pmu.c
+@@ -502,9 +502,9 @@ static void ssb_pmu_resources_init(struc
+ chipco_write32(cc, SSB_CHIPCO_PMU_MAXRES_MSK, max_msk);
+ }
+
+-/* http://bcm-v4.sipsolutions.net/802.11/SSB/PmuInit */
+ void ssb_pmu_init(struct ssb_chipcommon *cc)
+ {
++ struct ssb_bus *bus = cc->dev->bus;
+ u32 pmucap;
+
+ if (!(cc->capabilities & SSB_CHIPCO_CAP_PMU))
+@@ -516,12 +516,15 @@ void ssb_pmu_init(struct ssb_chipcommon
+ ssb_dprintk(KERN_DEBUG PFX "Found rev %u PMU (capabilities 0x%08X)\n",
+ cc->pmu.rev, pmucap);
+
+- if (cc->pmu.rev == 1)
+- chipco_mask32(cc, SSB_CHIPCO_PMU_CTL,
+- ~SSB_CHIPCO_PMU_CTL_NOILPONW);
+- else
+- chipco_set32(cc, SSB_CHIPCO_PMU_CTL,
+- SSB_CHIPCO_PMU_CTL_NOILPONW);
++ if (cc->pmu.rev >= 1) {
++ if ((bus->chip_id == 0x4325) && (bus->chip_rev < 2)) {
++ chipco_mask32(cc, SSB_CHIPCO_PMU_CTL,
++ ~SSB_CHIPCO_PMU_CTL_NOILPONW);
++ } else {
++ chipco_set32(cc, SSB_CHIPCO_PMU_CTL,
++ SSB_CHIPCO_PMU_CTL_NOILPONW);
++ }
++ }
+ ssb_pmu_pll_init(cc);
+ ssb_pmu_resources_init(cc);
+ }
+--- a/drivers/ssb/pci.c
++++ b/drivers/ssb/pci.c
+@@ -23,7 +23,6 @@
+
+ #include "ssb_private.h"
+
+-bool ssb_is_sprom_available(struct ssb_bus *bus);
+
+ /* Define the following to 1 to enable a printk on each coreswitch. */
+ #define SSB_VERBOSE_PCICORESWITCH_DEBUG 0
+@@ -169,7 +168,7 @@ err_pci:
+ }
+
+ /* Get the word-offset for a SSB_SPROM_XXX define. */
+-#define SPOFF(offset) ((offset) / sizeof(u16))
++#define SPOFF(offset) (((offset) - SSB_SPROM_BASE) / sizeof(u16))
+ /* Helper to extract some _offset, which is one of the SSB_SPROM_XXX defines. */
+ #define SPEX16(_outvar, _offset, _mask, _shift) \
+ out->_outvar = ((in[SPOFF(_offset)] & (_mask)) >> (_shift))
+@@ -254,13 +253,8 @@ static int sprom_do_read(struct ssb_bus
+ {
+ int i;
+
+- /* Check if SPROM can be read */
+- if (ioread16(bus->mmio + bus->sprom_offset) == 0xFFFF) {
+- ssb_printk(KERN_ERR PFX "Unable to read SPROM\n");
+- return -ENODEV;
+- }
+ for (i = 0; i < bus->sprom_size; i++)
+- sprom[i] = ioread16(bus->mmio + bus->sprom_offset + (i * 2));
++ sprom[i] = ioread16(bus->mmio + SSB_SPROM_BASE + (i * 2));
+
+ return 0;
+ }
+@@ -291,7 +285,7 @@ static int sprom_do_write(struct ssb_bus
+ ssb_printk("75%%");
+ else if (i % 2)
+ ssb_printk(".");
+- writew(sprom[i], bus->mmio + bus->sprom_offset + (i * 2));
++ writew(sprom[i], bus->mmio + SSB_SPROM_BASE + (i * 2));
+ mmiowb();
+ msleep(20);
+ }
+@@ -627,49 +621,21 @@ static int ssb_pci_sprom_get(struct ssb_
+ int err = -ENOMEM;
+ u16 *buf;
+
+- if (!ssb_is_sprom_available(bus)) {
+- ssb_printk(KERN_ERR PFX "No SPROM available!\n");
+- return -ENODEV;
+- }
+- if (bus->chipco.dev) { /* can be unavailible! */
+- /*
+- * get SPROM offset: SSB_SPROM_BASE1 except for
+- * chipcommon rev >= 31 or chip ID is 0x4312 and
+- * chipcommon status & 3 == 2
+- */
+- if (bus->chipco.dev->id.revision >= 31)
+- bus->sprom_offset = SSB_SPROM_BASE31;
+- else if (bus->chip_id == 0x4312 &&
+- (bus->chipco.status & 0x03) == 2)
+- bus->sprom_offset = SSB_SPROM_BASE31;
+- else
+- bus->sprom_offset = SSB_SPROM_BASE1;
+- } else {
+- bus->sprom_offset = SSB_SPROM_BASE1;
+- }
+- ssb_dprintk(KERN_INFO PFX "SPROM offset is 0x%x\n", bus->sprom_offset);
+-
+ buf = kcalloc(SSB_SPROMSIZE_WORDS_R123, sizeof(u16), GFP_KERNEL);
+ if (!buf)
+ goto out;
+ bus->sprom_size = SSB_SPROMSIZE_WORDS_R123;
+- err = sprom_do_read(bus, buf);
+- if (err)
+- goto out_free;
++ sprom_do_read(bus, buf);
+ err = sprom_check_crc(buf, bus->sprom_size);
+ if (err) {
+ /* try for a 440 byte SPROM - revision 4 and higher */
+ kfree(buf);
+ buf = kcalloc(SSB_SPROMSIZE_WORDS_R4, sizeof(u16),
+ GFP_KERNEL);
+- if (!buf) {
+- err = -ENOMEM;
++ if (!buf)
+ goto out;
+- }
+ bus->sprom_size = SSB_SPROMSIZE_WORDS_R4;
+- err = sprom_do_read(bus, buf);
+- if (err)
+- goto out_free;
++ sprom_do_read(bus, buf);
+ err = sprom_check_crc(buf, bus->sprom_size);
+ if (err) {
+ /* All CRC attempts failed.
+--- a/drivers/ssb/sprom.c
++++ b/drivers/ssb/sprom.c
+@@ -176,18 +176,3 @@ const struct ssb_sprom *ssb_get_fallback
+ {
+ return fallback_sprom;
+ }
+-
+-/* http://bcm-v4.sipsolutions.net/802.11/IsSpromAvailable */
+-bool ssb_is_sprom_available(struct ssb_bus *bus)
+-{
+- /* status register only exists on chipcomon rev >= 11 and we need check
+- for >= 31 only */
+- /* this routine differs from specs as we do not access SPROM directly
+- on PCMCIA */
+- if (bus->bustype == SSB_BUSTYPE_PCI &&
+- bus->chipco.dev && /* can be unavailible! */
+- bus->chipco.dev->id.revision >= 31)
+- return bus->chipco.capabilities & SSB_CHIPCO_CAP_SPROM;
+-
+- return true;
+-}
+--- a/include/linux/ssb/ssb.h
++++ b/include/linux/ssb/ssb.h
+@@ -306,7 +306,6 @@ struct ssb_bus {
+ u16 chip_id;
+ u16 chip_rev;
+ u16 sprom_size; /* number of words in sprom */
+- u16 sprom_offset;
+ u8 chip_package;
+
+ /* List of devices (cores) on the backplane. */
+--- a/include/linux/ssb/ssb_driver_chipcommon.h
++++ b/include/linux/ssb/ssb_driver_chipcommon.h
+@@ -46,7 +46,6 @@
+ #define SSB_PLLTYPE_7 0x00038000 /* 25Mhz, 4 dividers */
+ #define SSB_CHIPCO_CAP_PCTL 0x00040000 /* Power Control */
+ #define SSB_CHIPCO_CAP_OTPS 0x00380000 /* OTP size */
+-#define SSB_CHIPCO_CAP_SPROM 0x40000000 /* SPROM present */
+ #define SSB_CHIPCO_CAP_OTPS_SHIFT 19
+ #define SSB_CHIPCO_CAP_OTPS_BASE 5
+ #define SSB_CHIPCO_CAP_JTAGM 0x00400000 /* JTAG master present */
+@@ -565,7 +564,6 @@ struct ssb_chipcommon_pmu {
+ struct ssb_chipcommon {
+ struct ssb_device *dev;
+ u32 capabilities;
+- u32 status;
+ /* Fast Powerup Delay constant */
+ u16 fast_pwrup_delay;
+ struct ssb_chipcommon_pmu pmu;
+--- a/include/linux/ssb/ssb_regs.h
++++ b/include/linux/ssb/ssb_regs.h
+@@ -170,8 +170,7 @@
+ #define SSB_SPROMSIZE_WORDS_R4 220
+ #define SSB_SPROMSIZE_BYTES_R123 (SSB_SPROMSIZE_WORDS_R123 * sizeof(u16))
+ #define SSB_SPROMSIZE_BYTES_R4 (SSB_SPROMSIZE_WORDS_R4 * sizeof(u16))
+-#define SSB_SPROM_BASE1 0x1000
+-#define SSB_SPROM_BASE31 0x0800
++#define SSB_SPROM_BASE 0x1000
+ #define SSB_SPROM_REVISION 0x107E
+ #define SSB_SPROM_REVISION_REV 0x00FF /* SPROM Revision number */
+ #define SSB_SPROM_REVISION_CRC 0xFF00 /* SPROM CRC8 value */
drm-radeon-add-new-pci-ids.patch
drm-radeon-kms-r7xx-add-workaround-for-hw-issue-with-hdp-flush.patch
drm-i915-check-overlay-stride-errata-for-i830-and-i845.patch
-drm-i915-always-use-the-fixed-panel-timing-for-edp.patch
+revert-ssb-handle-netbook-devices-where-the-sprom-address-is-changed.patch
+ssb-do-not-read-sprom-if-it-does-not-exist.patch
+ssb-look-for-sprom-at-different-offset-on-higher-rev-cc.patch
+ssb-fix-null-ptr-deref-when-pcihost_wrapper-is-used.patch
+ssb-handle-alternate-ssprom-location.patch
--- /dev/null
+From d53cdbb94a52a920d5420ed64d986c3523a56743 Mon Sep 17 00:00:00 2001
+From: John W. Linville <linville@tuxdriver.com>
+Date: Wed, 31 Mar 2010 21:39:35 +0200
+Subject: ssb: do not read SPROM if it does not exist
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: John W. Linville <linville@tuxdriver.com>
+
+commit d53cdbb94a52a920d5420ed64d986c3523a56743 upstream.
+
+Attempting to read registers that don't exist on the SSB bus can cause
+hangs on some boxes. At least some b43 devices are 'in the wild' that
+don't have SPROMs at all. When the SSB bus support loads, it attempts
+to read these (non-existant) SPROMs and causes hard hangs on the box --
+no console output, etc.
+
+This patch adds some intelligence to determine whether or not the SPROM
+is present before attempting to read it. This avoids those hard hangs
+on those devices with no SPROM attached to their SSB bus. The
+SSB-attached devices (e.g. b43, et al.) won't work, but at least the box
+will survive to test further patches. :-)
+
+Signed-off-by: John W. Linville <linville@tuxdriver.com>
+Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
+Cc: Larry Finger <Larry.Finger@lwfinger.net>
+Cc: Michael Buesch <mb@bu3sch.de>
+Cc: Ben Hutchings <ben@decadent.org.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/ssb/driver_chipcommon.c | 2 ++
+ drivers/ssb/pci.c | 5 +++++
+ drivers/ssb/sprom.c | 14 ++++++++++++++
+ include/linux/ssb/ssb.h | 3 +++
+ include/linux/ssb/ssb_driver_chipcommon.h | 15 +++++++++++++++
+ 5 files changed, 39 insertions(+)
+
+--- a/drivers/ssb/driver_chipcommon.c
++++ b/drivers/ssb/driver_chipcommon.c
+@@ -233,6 +233,8 @@ void ssb_chipcommon_init(struct ssb_chip
+ {
+ if (!cc->dev)
+ return; /* We don't have a ChipCommon */
++ if (cc->dev->id.revision >= 11)
++ cc->status = chipco_read32(cc, SSB_CHIPCO_CHIPSTAT);
+ ssb_pmu_init(cc);
+ chipco_powercontrol_init(cc);
+ ssb_chipco_set_clockmode(cc, SSB_CLKMODE_FAST);
+--- a/drivers/ssb/pci.c
++++ b/drivers/ssb/pci.c
+@@ -621,6 +621,11 @@ static int ssb_pci_sprom_get(struct ssb_
+ int err = -ENOMEM;
+ u16 *buf;
+
++ if (!ssb_is_sprom_available(bus)) {
++ ssb_printk(KERN_ERR PFX "No SPROM available!\n");
++ return -ENODEV;
++ }
++
+ buf = kcalloc(SSB_SPROMSIZE_WORDS_R123, sizeof(u16), GFP_KERNEL);
+ if (!buf)
+ goto out;
+--- a/drivers/ssb/sprom.c
++++ b/drivers/ssb/sprom.c
+@@ -176,3 +176,17 @@ const struct ssb_sprom *ssb_get_fallback
+ {
+ return fallback_sprom;
+ }
++
++/* http://bcm-v4.sipsolutions.net/802.11/IsSpromAvailable */
++bool ssb_is_sprom_available(struct ssb_bus *bus)
++{
++ /* status register only exists on chipcomon rev >= 11 and we need check
++ for >= 31 only */
++ /* this routine differs from specs as we do not access SPROM directly
++ on PCMCIA */
++ if (bus->bustype == SSB_BUSTYPE_PCI &&
++ bus->chipco.dev->id.revision >= 31)
++ return bus->chipco.capabilities & SSB_CHIPCO_CAP_SPROM;
++
++ return true;
++}
+--- a/include/linux/ssb/ssb.h
++++ b/include/linux/ssb/ssb.h
+@@ -394,6 +394,9 @@ extern int ssb_bus_sdiobus_register(stru
+
+ extern void ssb_bus_unregister(struct ssb_bus *bus);
+
++/* Does the device have an SPROM? */
++extern bool ssb_is_sprom_available(struct ssb_bus *bus);
++
+ /* Set a fallback SPROM.
+ * See kdoc at the function definition for complete documentation. */
+ extern int ssb_arch_set_fallback_sprom(const struct ssb_sprom *sprom);
+--- a/include/linux/ssb/ssb_driver_chipcommon.h
++++ b/include/linux/ssb/ssb_driver_chipcommon.h
+@@ -53,6 +53,7 @@
+ #define SSB_CHIPCO_CAP_64BIT 0x08000000 /* 64-bit Backplane */
+ #define SSB_CHIPCO_CAP_PMU 0x10000000 /* PMU available (rev >= 20) */
+ #define SSB_CHIPCO_CAP_ECI 0x20000000 /* ECI available (rev >= 20) */
++#define SSB_CHIPCO_CAP_SPROM 0x40000000 /* SPROM present */
+ #define SSB_CHIPCO_CORECTL 0x0008
+ #define SSB_CHIPCO_CORECTL_UARTCLK0 0x00000001 /* Drive UART with internal clock */
+ #define SSB_CHIPCO_CORECTL_SE 0x00000002 /* sync clk out enable (corerev >= 3) */
+@@ -385,6 +386,7 @@
+
+
+ /** Chip specific Chip-Status register contents. */
++#define SSB_CHIPCO_CHST_4322_SPROM_EXISTS 0x00000040 /* SPROM present */
+ #define SSB_CHIPCO_CHST_4325_SPROM_OTP_SEL 0x00000003
+ #define SSB_CHIPCO_CHST_4325_DEFCIS_SEL 0 /* OTP is powered up, use def. CIS, no SPROM */
+ #define SSB_CHIPCO_CHST_4325_SPROM_SEL 1 /* OTP is powered up, SPROM is present */
+@@ -398,6 +400,18 @@
+ #define SSB_CHIPCO_CHST_4325_RCAL_VALUE_SHIFT 4
+ #define SSB_CHIPCO_CHST_4325_PMUTOP_2B 0x00000200 /* 1 for 2b, 0 for to 2a */
+
++/** Macros to determine SPROM presence based on Chip-Status register. */
++#define SSB_CHIPCO_CHST_4312_SPROM_PRESENT(status) \
++ ((status & SSB_CHIPCO_CHST_4325_SPROM_OTP_SEL) != \
++ SSB_CHIPCO_CHST_4325_OTP_SEL)
++#define SSB_CHIPCO_CHST_4322_SPROM_PRESENT(status) \
++ (status & SSB_CHIPCO_CHST_4322_SPROM_EXISTS)
++#define SSB_CHIPCO_CHST_4325_SPROM_PRESENT(status) \
++ (((status & SSB_CHIPCO_CHST_4325_SPROM_OTP_SEL) != \
++ SSB_CHIPCO_CHST_4325_DEFCIS_SEL) && \
++ ((status & SSB_CHIPCO_CHST_4325_SPROM_OTP_SEL) != \
++ SSB_CHIPCO_CHST_4325_OTP_SEL))
++
+
+
+ /** Clockcontrol masks and values **/
+@@ -564,6 +578,7 @@ struct ssb_chipcommon_pmu {
+ struct ssb_chipcommon {
+ struct ssb_device *dev;
+ u32 capabilities;
++ u32 status;
+ /* Fast Powerup Delay constant */
+ u16 fast_pwrup_delay;
+ struct ssb_chipcommon_pmu pmu;
--- /dev/null
+From da1fdb02d9200ff28b6f3a380d21930335fe5429 Mon Sep 17 00:00:00 2001
+From: Christoph Fritz <chf.fritz@googlemail.com>
+Date: Fri, 28 May 2010 10:45:59 +0200
+Subject: ssb: fix NULL ptr deref when pcihost_wrapper is used
+
+From: Christoph Fritz <chf.fritz@googlemail.com>
+
+commit da1fdb02d9200ff28b6f3a380d21930335fe5429 upstream.
+
+Ethernet driver b44 does register ssb by it's pcihost_wrapper
+and doesn't set ssb_chipcommon. A check on this value
+introduced with commit d53cdbb94a52a920d5420ed64d986c3523a56743
+and ea2db495f92ad2cf3301623e60cb95b4062bc484 triggers:
+
+BUG: unable to handle kernel NULL pointer dereference at 00000010
+IP: [<c1266c36>] ssb_is_sprom_available+0x16/0x30
+
+Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
+Signed-off-by: John W. Linville <linville@tuxdriver.com>
+Cc: Larry Finger <Larry.Finger@lwfinger.net>
+Cc: Ben Hutchings <ben@decadent.org.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/ssb/pci.c | 9 ++++++---
+ drivers/ssb/sprom.c | 1 +
+ 2 files changed, 7 insertions(+), 3 deletions(-)
+
+--- a/drivers/ssb/pci.c
++++ b/drivers/ssb/pci.c
+@@ -625,9 +625,12 @@ static int ssb_pci_sprom_get(struct ssb_
+ ssb_printk(KERN_ERR PFX "No SPROM available!\n");
+ return -ENODEV;
+ }
+-
+- bus->sprom_offset = (bus->chipco.dev->id.revision < 31) ?
+- SSB_SPROM_BASE1 : SSB_SPROM_BASE31;
++ if (bus->chipco.dev) { /* can be unavailible! */
++ bus->sprom_offset = (bus->chipco.dev->id.revision < 31) ?
++ SSB_SPROM_BASE1 : SSB_SPROM_BASE31;
++ } else {
++ bus->sprom_offset = SSB_SPROM_BASE1;
++ }
+
+ buf = kcalloc(SSB_SPROMSIZE_WORDS_R123, sizeof(u16), GFP_KERNEL);
+ if (!buf)
+--- a/drivers/ssb/sprom.c
++++ b/drivers/ssb/sprom.c
+@@ -185,6 +185,7 @@ bool ssb_is_sprom_available(struct ssb_b
+ /* this routine differs from specs as we do not access SPROM directly
+ on PCMCIA */
+ if (bus->bustype == SSB_BUSTYPE_PCI &&
++ bus->chipco.dev && /* can be unavailible! */
+ bus->chipco.dev->id.revision >= 31)
+ return bus->chipco.capabilities & SSB_CHIPCO_CAP_SPROM;
+
--- /dev/null
+From 9d1ac34ec3a67713308ae0883c3359c557f14d17 Mon Sep 17 00:00:00 2001
+From: Larry Finger <Larry.Finger@lwfinger.net>
+Date: Fri, 14 May 2010 22:08:58 -0500
+Subject: ssb: Handle alternate SSPROM location
+
+From: Larry Finger <Larry.Finger@lwfinger.net>
+
+commit 9d1ac34ec3a67713308ae0883c3359c557f14d17 upstream.
+
+In kernel Bugzilla #15825 (2 users), in a wireless mailing list thread
+(http://lists.infradead.org/pipermail/b43-dev/2010-May/000124.html), and on a
+netbook owned by John Linville
+(http://marc.info/?l=linux-wireless&m=127230751408818&w=4), there are reports
+of ssb failing to detect an SPROM at the normal location. After studying the
+MMIO trace dump for the Broadcom wl driver, it was determined that the affected
+boxes had a relocated SPROM.
+
+This patch fixes all systems that have reported this problem.
+
+Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
+Signed-off-by: John W. Linville <linville@tuxdriver.com>
+Cc: Ben Hutchings <ben@decadent.org.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/ssb/driver_chipcommon.c | 1 +
+ drivers/ssb/pci.c | 15 +++++++++++++--
+ 2 files changed, 14 insertions(+), 2 deletions(-)
+
+--- a/drivers/ssb/driver_chipcommon.c
++++ b/drivers/ssb/driver_chipcommon.c
+@@ -235,6 +235,7 @@ void ssb_chipcommon_init(struct ssb_chip
+ return; /* We don't have a ChipCommon */
+ if (cc->dev->id.revision >= 11)
+ cc->status = chipco_read32(cc, SSB_CHIPCO_CHIPSTAT);
++ ssb_dprintk(KERN_INFO PFX "chipcommon status is 0x%x\n", cc->status);
+ ssb_pmu_init(cc);
+ chipco_powercontrol_init(cc);
+ ssb_chipco_set_clockmode(cc, SSB_CLKMODE_FAST);
+--- a/drivers/ssb/pci.c
++++ b/drivers/ssb/pci.c
+@@ -626,11 +626,22 @@ static int ssb_pci_sprom_get(struct ssb_
+ return -ENODEV;
+ }
+ if (bus->chipco.dev) { /* can be unavailible! */
+- bus->sprom_offset = (bus->chipco.dev->id.revision < 31) ?
+- SSB_SPROM_BASE1 : SSB_SPROM_BASE31;
++ /*
++ * get SPROM offset: SSB_SPROM_BASE1 except for
++ * chipcommon rev >= 31 or chip ID is 0x4312 and
++ * chipcommon status & 3 == 2
++ */
++ if (bus->chipco.dev->id.revision >= 31)
++ bus->sprom_offset = SSB_SPROM_BASE31;
++ else if (bus->chip_id == 0x4312 &&
++ (bus->chipco.status & 0x03) == 2)
++ bus->sprom_offset = SSB_SPROM_BASE31;
++ else
++ bus->sprom_offset = SSB_SPROM_BASE1;
+ } else {
+ bus->sprom_offset = SSB_SPROM_BASE1;
+ }
++ ssb_dprintk(KERN_INFO PFX "SPROM offset is 0x%x\n", bus->sprom_offset);
+
+ buf = kcalloc(SSB_SPROMSIZE_WORDS_R123, sizeof(u16), GFP_KERNEL);
+ if (!buf)
--- /dev/null
+From ea2db495f92ad2cf3301623e60cb95b4062bc484 Mon Sep 17 00:00:00 2001
+From: Rafał Miłecki <zajec5@gmail.com>
+Date: Wed, 31 Mar 2010 21:59:21 +0200
+Subject: ssb: Look for SPROM at different offset on higher rev CC
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Rafał Miłecki <zajec5@gmail.com>
+
+commit ea2db495f92ad2cf3301623e60cb95b4062bc484 upstream.
+
+Our offset handling becomes even a little more hackish now. For some reason I
+do not understand all offsets as inrelative. It assumes base offset is 0x1000
+but it will work for now as we make offsets relative anyway by removing base
+0x1000. Should be cleaner however.
+
+Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
+Signed-off-by: John W. Linville <linville@tuxdriver.com>
+Cc: Larry Finger <Larry.Finger@lwfinger.net>
+Cc: Ben Hutchings <ben@decadent.org.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+
+---
+ drivers/ssb/pci.c | 9 ++++++---
+ include/linux/ssb/ssb.h | 1 +
+ include/linux/ssb/ssb_regs.h | 3 ++-
+ 3 files changed, 9 insertions(+), 4 deletions(-)
+
+--- a/drivers/ssb/pci.c
++++ b/drivers/ssb/pci.c
+@@ -168,7 +168,7 @@ err_pci:
+ }
+
+ /* Get the word-offset for a SSB_SPROM_XXX define. */
+-#define SPOFF(offset) (((offset) - SSB_SPROM_BASE) / sizeof(u16))
++#define SPOFF(offset) (((offset) - SSB_SPROM_BASE1) / sizeof(u16))
+ /* Helper to extract some _offset, which is one of the SSB_SPROM_XXX defines. */
+ #define SPEX16(_outvar, _offset, _mask, _shift) \
+ out->_outvar = ((in[SPOFF(_offset)] & (_mask)) >> (_shift))
+@@ -254,7 +254,7 @@ static int sprom_do_read(struct ssb_bus
+ int i;
+
+ for (i = 0; i < bus->sprom_size; i++)
+- sprom[i] = ioread16(bus->mmio + SSB_SPROM_BASE + (i * 2));
++ sprom[i] = ioread16(bus->mmio + bus->sprom_offset + (i * 2));
+
+ return 0;
+ }
+@@ -285,7 +285,7 @@ static int sprom_do_write(struct ssb_bus
+ ssb_printk("75%%");
+ else if (i % 2)
+ ssb_printk(".");
+- writew(sprom[i], bus->mmio + SSB_SPROM_BASE + (i * 2));
++ writew(sprom[i], bus->mmio + bus->sprom_offset + (i * 2));
+ mmiowb();
+ msleep(20);
+ }
+@@ -626,6 +626,9 @@ static int ssb_pci_sprom_get(struct ssb_
+ return -ENODEV;
+ }
+
++ bus->sprom_offset = (bus->chipco.dev->id.revision < 31) ?
++ SSB_SPROM_BASE1 : SSB_SPROM_BASE31;
++
+ buf = kcalloc(SSB_SPROMSIZE_WORDS_R123, sizeof(u16), GFP_KERNEL);
+ if (!buf)
+ goto out;
+--- a/include/linux/ssb/ssb.h
++++ b/include/linux/ssb/ssb.h
+@@ -305,6 +305,7 @@ struct ssb_bus {
+ /* ID information about the Chip. */
+ u16 chip_id;
+ u16 chip_rev;
++ u16 sprom_offset;
+ u16 sprom_size; /* number of words in sprom */
+ u8 chip_package;
+
+--- a/include/linux/ssb/ssb_regs.h
++++ b/include/linux/ssb/ssb_regs.h
+@@ -170,7 +170,8 @@
+ #define SSB_SPROMSIZE_WORDS_R4 220
+ #define SSB_SPROMSIZE_BYTES_R123 (SSB_SPROMSIZE_WORDS_R123 * sizeof(u16))
+ #define SSB_SPROMSIZE_BYTES_R4 (SSB_SPROMSIZE_WORDS_R4 * sizeof(u16))
+-#define SSB_SPROM_BASE 0x1000
++#define SSB_SPROM_BASE1 0x1000
++#define SSB_SPROM_BASE31 0x0800
+ #define SSB_SPROM_REVISION 0x107E
+ #define SSB_SPROM_REVISION_REV 0x00FF /* SPROM Revision number */
+ #define SSB_SPROM_REVISION_CRC 0xFF00 /* SPROM CRC8 value */
projects / thirdparty / kernel / stable-queue.git / commitdiff
