soc: qcom: llcc: Add regmap for Broadcast_AND region

Until SM8450, there was only one broadcast region (Broadcast_OR)
used to broadcast write and check for status bit 0.
>From SM8450 onwards another broadcast region (Broadcast_AND) has been
added which checks for status bit 1. This hasn't been updated and
Broadcast_OR region was wrongly being used to check for status bit 1 all
along.

Hence define new regmap structure for Broadcast_AND region and initialize
this regmap when HW block version is greater than 4.1, otherwise
initialize as a NULL pointer for backwards compatibility.
Switch from broadcast_OR to broadcast_AND region (when defined in DT)
for checking status bit 1 as Broadcast_OR region checks only for bit 0.

Signed-off-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com>
Reviewed-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Link: https://lore.kernel.org/r/9cf19928a67eaa577ae0f02de5bf86276be34ea2.1717014052.git.quic_uchalich@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c
index 4379a5f8ddf32efb8f763ed6c3cc3bef4ca7ed01..110b1f89aa59cf7c67a28537bd76e263cb2d6a7f 100644 (file)
--- a/drivers/soc/qcom/llcc-qcom.c
+++ b/drivers/soc/qcom/llcc-qcom.c
@@ -855,6 +855,7 @@ EXPORT_SYMBOL_GPL(llcc_slice_putd);
 static int llcc_update_act_ctrl(u32 sid,
                                u32 act_ctrl_reg_val, u32 status)
 {
+       struct regmap *regmap;
        u32 act_ctrl_reg;
        u32 act_clear_reg;
        u32 status_reg;
@@ -883,7 +884,8 @@ static int llcc_update_act_ctrl(u32 sid,
                return ret;
 
        if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
-               ret = regmap_read_poll_timeout(drv_data->bcast_regmap, status_reg,
+               regmap = drv_data->bcast_and_regmap ?: drv_data->bcast_regmap;
+               ret = regmap_read_poll_timeout(regmap, status_reg,
                                      slice_status, (slice_status & ACT_COMPLETE),
                                      0, LLCC_STATUS_READ_DELAY);
                if (ret)
@@ -1318,6 +1320,18 @@ static int qcom_llcc_probe(struct platform_device *pdev)
 
        drv_data->version = version;
 
+       /* Applicable only when drv_data->version >= 4.1 */
+       if (drv_data->version >= LLCC_VERSION_4_1_0_0) {
+               drv_data->bcast_and_regmap = qcom_llcc_init_mmio(pdev, i + 1, "llcc_broadcast_and_base");
+               if (IS_ERR(drv_data->bcast_and_regmap)) {
+                       ret = PTR_ERR(drv_data->bcast_and_regmap);
+                       if (ret == -EINVAL)
+                               drv_data->bcast_and_regmap = NULL;
+                       else
+                               goto err;
+               }
+       }
+
        llcc_cfg = cfg->sct_data;
        sz = cfg->size;
 

diff --git a/include/linux/soc/qcom/llcc-qcom.h b/include/linux/soc/qcom/llcc-qcom.h
index 1a886666bbb62597eb41439093d70fa405d188a5..9e9f528b13701fcf9df2f1369a1d365ed1f30c71 100644 (file)
--- a/include/linux/soc/qcom/llcc-qcom.h
+++ b/include/linux/soc/qcom/llcc-qcom.h
@@ -115,7 +115,8 @@ struct llcc_edac_reg_offset {
 /**
  * struct llcc_drv_data - Data associated with the llcc driver
  * @regmaps: regmaps associated with the llcc device
- * @bcast_regmap: regmap associated with llcc broadcast offset
+ * @bcast_regmap: regmap associated with llcc broadcast OR offset
+ * @bcast_and_regmap: regmap associated with llcc broadcast AND offset
  * @cfg: pointer to the data structure for slice configuration
  * @edac_reg_offset: Offset of the LLCC EDAC registers
  * @lock: mutex associated with each slice
@@ -129,6 +130,7 @@ struct llcc_edac_reg_offset {
 struct llcc_drv_data {
        struct regmap **regmaps;
        struct regmap *bcast_regmap;
+       struct regmap *bcast_and_regmap;
        const struct llcc_slice_config *cfg;
        const struct llcc_edac_reg_offset *edac_reg_offset;
        struct mutex lock;