drm/xe/migrate: Fix alignment check

The check would fail if the address is unaligned, but not when
accounting the offset. Instead of `buf | offset` it should have
been `buf + offset`. To make it more readable and also drop the
uintptr_t, just use the IS_ALIGNED() macro.

Fixes: 270172f64b11 ("drm/xe: Update xe_ttm_access_memory to use GPU for non-visible access")
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://lore.kernel.org/r/20250710-migrate-aligned-v1-1-44003ef3c078@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
(cherry picked from commit 81e139db6900503a2e68009764054fad128fbf95)
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>

diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index 73286b815f395b4fc8f23b7bc28fa7156efbda97..07a5161c7d5b3e4b1ce41234854c3d7fd7f8db85 100644 (file)
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -1817,8 +1817,8 @@ int xe_migrate_access_memory(struct xe_migrate *m, struct xe_bo *bo,
        xe_bo_assert_held(bo);
 
        /* Use bounce buffer for small access and unaligned access */
-       if (len & XE_CACHELINE_MASK ||
-           ((uintptr_t)buf | offset) & XE_CACHELINE_MASK) {
+       if (!IS_ALIGNED(len, XE_CACHELINE_BYTES) ||
+           !IS_ALIGNED((unsigned long)buf + offset, XE_CACHELINE_BYTES)) {
                int buf_offset = 0;
 
                /*