{
HOST_WIDE_INT odd;
poly_uint64 nelt = d->perm.length ();
- rtx out, in0, in1, x;
+ rtx out, in0, in1;
machine_mode vmode = d->vmode;
if (GET_MODE_UNIT_SIZE (vmode) > 8)
at the head of aarch64-sve.md for details. */
if (BYTES_BIG_ENDIAN && d->vec_flags == VEC_ADVSIMD)
{
- x = in0, in0 = in1, in1 = x;
+ std::swap (in0, in1);
odd = !odd;
}
out = d->target;
aarch64_evpc_uzp (struct expand_vec_perm_d *d)
{
HOST_WIDE_INT odd;
- rtx out, in0, in1, x;
+ rtx out, in0, in1;
machine_mode vmode = d->vmode;
if (GET_MODE_UNIT_SIZE (vmode) > 8)
at the head of aarch64-sve.md for details. */
if (BYTES_BIG_ENDIAN && d->vec_flags == VEC_ADVSIMD)
{
- x = in0, in0 = in1, in1 = x;
+ std::swap (in0, in1);
odd = !odd;
}
out = d->target;
{
unsigned int high;
poly_uint64 nelt = d->perm.length ();
- rtx out, in0, in1, x;
+ rtx out, in0, in1;
machine_mode vmode = d->vmode;
if (GET_MODE_UNIT_SIZE (vmode) > 8)
at the head of aarch64-sve.md for details. */
if (BYTES_BIG_ENDIAN && d->vec_flags == VEC_ADVSIMD)
{
- x = in0, in0 = in1, in1 = x;
+ std::swap (in0, in1);
high = !high;
}
out = d->target;