re PR testsuite/40359 (Revision 148211 caused a lot of failures in the vect test...

PR40359

From-SVN: r148275

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index dbb97e1881ea75cfbca1bd8817eaa5cdff011281..eec29c75a26d621db4a4b11e939149440e2115f5 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,12 @@
+2009-06-08  Revital Eres  <eres@il.ibm.com>
+
+       PR40359
+       * gcc.dg/vect/vect-58.c: Change checks to use vect_hw_misalign.
+       * gcc.dg/vect/vect-88.c: Likewise.
+       * gcc.dg/vect/no-section-anchors-vect-66.c: Likewise.
+       * gcc.dg/vect/pr25413.c: Likewise.
+       * lib/target-supports.exp: Add i?86 to vect_hw_misalign.
+
 2009-06-07  Ian Lance Taylor  <iant@google.com>
 
        * g++.dg/warn/Wswitch-3.C: New testcase.

diff --git a/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-66.c b/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-66.c
index 49a9098f79f69412cb1d4e36cc8162593a20544c..78419fae851df6f792719e77a8e9c921d4a8386e 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-66.c
+++ b/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-66.c
@@ -78,6 +78,7 @@ int main (void)
 }
 
 /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" } } */
-/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
-/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" } } */
+/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" { xfail vect_hw_misalign } } } */
+/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { target vect_hw_misalign } } } */
+/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail vect_hw_misalign } } } */
 /* { dg-final { cleanup-tree-dump "vect" } } */

diff --git a/gcc/testsuite/gcc.dg/vect/pr25413.c b/gcc/testsuite/gcc.dg/vect/pr25413.c
index 1cb33e3b9dcbfc064668c9c953840f8bf48ba572..e483732680f7f684a6ac826c588515554d953a60 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/pr25413.c
+++ b/gcc/testsuite/gcc.dg/vect/pr25413.c
@@ -33,7 +33,7 @@ int main (void)
 } 
 
 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vector_alignment_reachable_for_64bit } } } */
-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { target { ! vector_alignment_reachable_for_64bit } } } } */
-/* { dg-final { scan-tree-dump-times "vector alignment may not be reachable" 1 "vect" { target { ! vector_alignment_reachable_for_64bit } } } } */
-/* { dg-final { scan-tree-dump-times "not vectorized: unsupported unaligned store" 1 "vect" { target { ! vector_alignment_reachable_for_64bit } } } } */
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { target { {! vector_alignment_reachable_for_64bit} && {! vect_hw_misalign} } } } } */
+/* { dg-final { scan-tree-dump-times "vector alignment may not be reachable" 1 "vect" { target { {! vector_alignment_reachable_for_64bit} && {! vect_hw_misalign} } } } } */
+/* { dg-final { scan-tree-dump-times "not vectorized: unsupported unaligned store" 1 "vect" { target { {! vector_alignment_reachable_for_64bit} && {! vect_hw_misalign} } } } } */
 /* { dg-final { cleanup-tree-dump "vect" } } */

diff --git a/gcc/testsuite/gcc.dg/vect/vect-58.c b/gcc/testsuite/gcc.dg/vect/vect-58.c
index fa8c91b3071999ff19543dc7194b1717f187c7e2..5ceb15627fcc19e1d4d90d9b3a24a2bb5b694c8b 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/vect-58.c
+++ b/gcc/testsuite/gcc.dg/vect/vect-58.c
@@ -58,6 +58,7 @@ int main (void)
 }
 
 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
-/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
-/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" } } */
+/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 3 "vect" { target vect_hw_misalign } } } */
+/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" { xfail vect_hw_misalign } } } */
+/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail vect_hw_misalign } } } */
 /* { dg-final { cleanup-tree-dump "vect" } } */

diff --git a/gcc/testsuite/gcc.dg/vect/vect-88.c b/gcc/testsuite/gcc.dg/vect/vect-88.c
index a166633491622c8344c01f7069e8ce0d6a9f5f7c..3dc5588e92dd5facbba29e08467acf3d4e2d06b8 100644 (file)
--- a/gcc/testsuite/gcc.dg/vect/vect-88.c
+++ b/gcc/testsuite/gcc.dg/vect/vect-88.c
@@ -50,7 +50,8 @@ int main (void)
 
 /* Fails for targets that don't vectorize PLUS (e.g alpha).  */
 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
-/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
-/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" {target vector_alignment_reachable } } } */
-/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 1 "vect" {target {! vector_alignment_reachable} } } } */
+/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { target vect_hw_misalign } } } */
+/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" { xfail vect_hw_misalign } } } */
+/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" {target { vector_alignment_reachable && {! vect_hw_misalign} } } } } */
+/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 1 "vect" {target { {! vector_alignment_reachable} && {! vect_hw_misalign} } } } } */
 /* { dg-final { cleanup-tree-dump "vect" } } */

diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 7703380b5ad30963c6e295c2011b4a7c92bc23fd..e2da9b0b73d8e4a8b9e92c432184476c7e3038a8 100644 (file)
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -2231,7 +2231,8 @@ proc check_effective_target_vect_hw_misalign { } {
         verbose "check_effective_target_vect_hw_misalign: using cached result" 2
     } else {
         set et_vect_hw_misalign_saved 0
-       if { [istarget x86_64-*-*] } {
+       if { ([istarget x86_64-*-*] 
+            || [istarget i?86-*-*]) } {
           set et_vect_hw_misalign_saved 1
        }
     }