mtd: spi-nor: remove NO_CHIP_ERASE flag

There's no flash using it and we'd like to rely instead on SFDP data,
thus remove it.

Tested-by: Fabio Estevam <festevam@denx.de>
Link: https://lore.kernel.org/r/20231125123529.55686-5-tudor.ambarus@linaro.org
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>

diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index 52e5b569ddfd6d219cef44c33d686eb341e68f5c..503fed90c2fa575b453212b1d07f79a246186a28 100644 (file)
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -2888,9 +2888,6 @@ static void spi_nor_init_flags(struct spi_nor *nor)
                        nor->flags |= SNOR_F_HAS_SR_BP3_BIT6;
        }
 
-       if (flags & NO_CHIP_ERASE)
-               nor->flags |= SNOR_F_NO_OP_CHIP_ERASE;
-
        if (flags & SPI_NOR_RWW && nor->params->n_banks > 1 &&
            !nor->controller_ops)
                nor->flags |= SNOR_F_RWW;

diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
index b43ea2d49e74181382518a171659c5b4afbb4b33..29ed67725b18e11a9aa852f9c2075cde20348501 100644 (file)
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -489,7 +489,6 @@ struct spi_nor_id {
  *                            Usually these will power-up in a write-protected
  *                            state.
  *   SPI_NOR_NO_ERASE:        no erase command needed.
- *   NO_CHIP_ERASE:           chip does not support chip erase.
  *   SPI_NOR_NO_FR:           can't do fastread.
  *   SPI_NOR_QUAD_PP:         flash supports Quad Input Page Program.
  *   SPI_NOR_RWW:             flash supports reads while write.
@@ -539,10 +538,9 @@ struct flash_info {
 #define SPI_NOR_BP3_SR_BIT6            BIT(4)
 #define SPI_NOR_SWP_IS_VOLATILE                BIT(5)
 #define SPI_NOR_NO_ERASE               BIT(6)
-#define NO_CHIP_ERASE                  BIT(7)
-#define SPI_NOR_NO_FR                  BIT(8)
-#define SPI_NOR_QUAD_PP                        BIT(9)
-#define SPI_NOR_RWW                    BIT(10)
+#define SPI_NOR_NO_FR                  BIT(7)
+#define SPI_NOR_QUAD_PP                        BIT(8)
+#define SPI_NOR_RWW                    BIT(9)
 
        u8 no_sfdp_flags;
 #define SPI_NOR_SKIP_SFDP              BIT(0)