[ gas/ChangeLog ]

2003-01-02  Chris Demetriou  <cgd@broadcom.com>

        * config/tc-mips.c: Update copyright years to include 2003.
        (mips_ip): Fix indentation of "+A", "+B", and "+C" handling.
        Additionally, clean up their code slightly and clean up their
        comments some more.

        * doc/c-mips.texi: Add MIPS32r2 to ".set mipsN" documentation.

[ gas/testsuite/ChangeLog ]
2003-01-02  Chris Demetriou  <cgd@broadcom.com>

        * gas/mips/elf_arch_mips32r2.d: Fix file description comment.

[ include/opcode/ChangeLog ]
2003-01-02  Chris Demetriou  <cgd@broadcom.com>

        * mips.h: Update copyright years to include 2002 (which had
        been missed previously) and 2003.  Make comments about "+A",
        "+B", and "+C" operand types more descriptive.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 8be8c172b3ee6d080d25476a4dab2d3e1eb951b3..7af52931fff19bd2e4976a036fd46dce8a8ab20c 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,12 @@
+2003-01-02  Chris Demetriou  <cgd@broadcom.com>
+
+       * config/tc-mips.c: Update copyright years to include 2003.
+       (mips_ip): Fix indentation of "+A", "+B", and "+C" handling.
+       Additionally, clean up their code slightly and clean up their
+       comments some more.
+
+       * doc/c-mips.texi: Add MIPS32r2 to ".set mipsN" documentation.
+
 2003-01-01  Daniel Jacobowitz  <drow@mvista.com>
 
        * doc/Makefile.am (as.1): Depend on "asconfig.texi gasver.texi

diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 2c46fecab90813a7588d877ca02295fa14d31e06..b15d84f1e871bb05cb605fedfce1a2ad0b5580fd 100644 (file)
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -1,5 +1,5 @@
 /* tc-mips.c -- assemble code for a MIPS chip.
-   Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
+   Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
    Free Software Foundation, Inc.
    Contributed by the OSF and Ralph Campbell.
    Written by Keith Knowles and Ralph Campbell, working independently.
@@ -8118,6 +8118,7 @@ mips_ip (str, ip)
   unsigned int regno;
   unsigned int lastregno = 0;
   unsigned int lastpos = 0;
+  unsigned int limlo, limhi;
   char *s_reset;
   char save_c = 0;
 
@@ -8286,58 +8287,76 @@ mips_ip (str, ip)
            case '+':           /* Opcode extension character.  */
              switch (*++args)
                {
-                 case 'A':             /* ins/ext "pos".  */
-                   my_getExpression (&imm_expr, s);
-                   check_absolute_expr (ip, &imm_expr);
-                   if ((unsigned long) imm_expr.X_add_number > 31)
-                     {
-                       as_bad (_("Improper position (%lu)"),
-                               (unsigned long) imm_expr.X_add_number);
-                       imm_expr.X_add_number = 0;
-                     }
-                   lastpos = imm_expr.X_add_number;
-                   ip->insn_opcode |= lastpos << OP_SH_SHAMT;
-                   imm_expr.X_op = O_absent;
-                   s = expr_end;
-                   continue;
-
-                 case 'B':             /* "ins" size spec (becomes MSB).  */
-                   my_getExpression (&imm_expr, s);
-                   check_absolute_expr (ip, &imm_expr);
-                   if (imm_expr.X_add_number == 0
-                       || (unsigned long) imm_expr.X_add_number > 32
-                       || ((unsigned long) imm_expr.X_add_number
-                           + lastpos) > 32)
-                     {
-                       as_bad (_("Improper insert size (%lu, position %lu)"),
-                               (unsigned long) imm_expr.X_add_number,
-                               (unsigned long) lastpos);
-                       imm_expr.X_add_number &= OP_MASK_INSMSB;
-                     }
-                   ip->insn_opcode |= (lastpos + imm_expr.X_add_number
-                                       - 1) << OP_SH_INSMSB;
-                   imm_expr.X_op = O_absent;
-                   s = expr_end;
-                   continue;
-
-                 case 'C':             /* "ext" size spec (becomes MSBD).  */
-                   my_getExpression (&imm_expr, s);
-                   check_absolute_expr (ip, &imm_expr);
-                   if (imm_expr.X_add_number == 0
-                       || (unsigned long) imm_expr.X_add_number > 32
-                       || ((unsigned long) imm_expr.X_add_number
-                           + lastpos) > 32)
-                     {
-                       as_bad (_("Improper extract size (%lu, position %lu)"),
-                               (unsigned long) imm_expr.X_add_number,
-                               (unsigned long) lastpos);
-                       imm_expr.X_add_number &= OP_MASK_EXTMSBD;
-                     }
-                   ip->insn_opcode |= (imm_expr.X_add_number
-                                       - 1) << OP_SH_EXTMSBD;
-                   imm_expr.X_op = O_absent;
-                   s = expr_end;
-                   continue;
+               case 'A':               /* ins/ext position, becomes LSB.  */
+                 limlo = 0;
+                 limhi = 31;
+                 my_getExpression (&imm_expr, s);
+                 check_absolute_expr (ip, &imm_expr);
+                 if ((unsigned long) imm_expr.X_add_number < limlo
+                     || (unsigned long) imm_expr.X_add_number > limhi)
+                   {
+                     as_bad (_("Improper position (%lu)"),
+                             (unsigned long) imm_expr.X_add_number);
+                     imm_expr.X_add_number = limlo;
+                   }
+                 lastpos = imm_expr.X_add_number;
+                 ip->insn_opcode |= (imm_expr.X_add_number
+                                     & OP_MASK_SHAMT) << OP_SH_SHAMT;
+                 imm_expr.X_op = O_absent;
+                 s = expr_end;
+                 continue;
+
+               case 'B':               /* ins size, becomes MSB.  */
+                 limlo = 1;
+                 limhi = 32;
+                 my_getExpression (&imm_expr, s);
+                 check_absolute_expr (ip, &imm_expr);
+                 /* Check for negative input so that small negative numbers
+                    will not succeed incorrectly.  The checks against
+                    (pos+size) transitively check "size" itself,
+                    assuming that "pos" is reasonable.  */
+                 if ((long) imm_expr.X_add_number < 0
+                     || ((unsigned long) imm_expr.X_add_number
+                         + lastpos) < limlo
+                     || ((unsigned long) imm_expr.X_add_number
+                         + lastpos) > limhi)
+                   {
+                     as_bad (_("Improper insert size (%lu, position %lu)"),
+                             (unsigned long) imm_expr.X_add_number,
+                             (unsigned long) lastpos);
+                     imm_expr.X_add_number = limlo - lastpos;
+                   }
+                 ip->insn_opcode |= ((lastpos + imm_expr.X_add_number - 1)
+                                     & OP_MASK_INSMSB) << OP_SH_INSMSB;
+                 imm_expr.X_op = O_absent;
+                 s = expr_end;
+                 continue;
+
+               case 'C':               /* ext size, becomes MSBD.  */
+                 limlo = 1;
+                 limhi = 32;
+                 my_getExpression (&imm_expr, s);
+                 check_absolute_expr (ip, &imm_expr);
+                 /* Check for negative input so that small negative numbers
+                    will not succeed incorrectly.  The checks against
+                    (pos+size) transitively check "size" itself,
+                    assuming that "pos" is reasonable.  */
+                 if ((long) imm_expr.X_add_number < 0
+                     || ((unsigned long) imm_expr.X_add_number
+                         + lastpos) < limlo
+                     || ((unsigned long) imm_expr.X_add_number
+                         + lastpos) > limhi)
+                   {
+                     as_bad (_("Improper extract size (%lu, position %lu)"),
+                             (unsigned long) imm_expr.X_add_number,
+                             (unsigned long) lastpos);
+                     imm_expr.X_add_number = limlo - lastpos;
+                   }
+                 ip->insn_opcode |= ((imm_expr.X_add_number - 1)
+                                     & OP_MASK_EXTMSBD) << OP_SH_EXTMSBD;
+                 imm_expr.X_op = O_absent;
+                 s = expr_end;
+                 continue;
 
                case 'D':
                  /* +D is for disassembly only; never match.  */

diff --git a/gas/doc/c-mips.texi b/gas/doc/c-mips.texi
index 621efe8339791beef8a6f2d80c678f5f7aaae852..4894c3f3642c838aea200f08ff80ed77b6601371 100644 (file)
--- a/gas/doc/c-mips.texi
+++ b/gas/doc/c-mips.texi
@@ -288,8 +288,8 @@ assembly language programmers!
 @kindex @code{.set mips@var{n}}
 @sc{gnu} @code{@value{AS}} supports an additional directive to change
 the @sc{mips} Instruction Set Architecture level on the fly: @code{.set
-mips@var{n}}.  @var{n} should be a number from 0 to 5, or 32 or 64.
-The values 1 to 5, 32, and 64 make the assembler accept instructions
+mips@var{n}}.  @var{n} should be a number from 0 to 5, or 32, 32r2, or 64.
+The values other than 0 make the assembler accept instructions
 for the corresponding @sc{isa} level, from that point on in the
 assembly.  @code{.set mips@var{n}} affects not only which instructions
 are permitted, but also how certain macros are expanded.  @code{.set

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index a9c16c98af168e1d605ac1bbb6910b1c9cf34223..a0100048953ae12c737e44842511008735846502 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2003-01-02  Chris Demetriou  <cgd@broadcom.com>
+
+       * gas/mips/elf_arch_mips32r2.d: Fix file description comment.
+
 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
 
        * gas/mips/cp0sel-names-mips32.d: New test.

diff --git a/gas/testsuite/gas/mips/mips32r2.d b/gas/testsuite/gas/mips/mips32r2.d
index 196cb41eb5f2c495fb3e8bbedb7846824987c81b..1f70e9b52be3f3f311544a3cc67b4cc1ac523c65 100644 (file)
--- a/gas/testsuite/gas/mips/mips32r2.d
+++ b/gas/testsuite/gas/mips/mips32r2.d
@@ -1,7 +1,7 @@
 #objdump: -dr --prefix-addresses --show-raw-insn -M reg-names=numeric
 #name: MIPS MIPS32r2 instructions
 
-# Check MIPS32 instruction assembly
+# Check MIPS32 Release 2 (mips32r2) instruction assembly
 
 .*: +file format .*mips.*
 

diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 89a231bcec5290669c13104ea5063ca539cb407b..7386c5edf7007b0ec85265221a3f858c826ac9d1 100644 (file)
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,9 @@
+2003-01-02  Chris Demetriou  <cgd@broadcom.com>
+
+       * mips.h: Update copyright years to include 2002 (which had
+       been missed previously) and 2003.  Make comments about "+A",
+       "+B", and "+C" operand types more descriptive.
+
 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
 
        * mips.h: Note that the "+D" operand type name is now used.

diff --git a/include/opcode/mips.h b/include/opcode/mips.h
index 19f3e21519a035d2ee9ebb047ef1b6fa044e8dae..bcc0fc68039ba2c0f8807c051e2d722a3afccd4f 100644 (file)
--- a/include/opcode/mips.h
+++ b/include/opcode/mips.h
@@ -1,5 +1,5 @@
 /* mips.h.  Mips opcode list for GDB, the GNU debugger.
-   Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001
+   Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
    Free Software Foundation, Inc.
    Contributed by Ralph Campbell and OSF
    Commented and modified by Ian Lance Taylor, Cygnus Support
@@ -233,11 +233,14 @@ struct mips_opcode
    "x" accept and ignore register name
    "z" must be zero register
    "K" 5 bit Hardware Register (rdhwr instruction) (OP_*_RD)
-   "+A" 5 bit ins/ext position/lsb (OP_*_SHAMT)
-   "+B" 5 bit "ins" size spec (OP_*_INSMSB).  Requires that "+A"
-       occur first!
-   "+C" 5 bit "ext" msbd spec (OP_*_EXTMSBD).  Requires that "+A"
-       occur first!
+   "+A" 5 bit ins/ext position, which becomes LSB (OP_*_SHAMT).
+       Enforces: 0 <= pos < 32.
+   "+B" 5 bit ins size, which becomes MSB (OP_*_INSMSB).
+       Requires that "+A" occur first to set position.
+       Enforces: 0 < (pos+size) <= 32.
+   "+C" 5 bit ext size, which becomes MSBD (OP_*_EXTMSBD).
+       Requires that "+A" occur first to set position.
+       Enforces: 0 < (pos+size) <= 32.
 
    Floating point instructions:
    "D" 5 bit destination register (OP_*_FD)