5.10-stable patches

added patches:
	pci-dpc-quirk-pio-log-size-for-intel-ice-lake-root-ports.patch

diff --git a/queue-5.10/pci-dpc-quirk-pio-log-size-for-intel-ice-lake-root-ports.patch b/queue-5.10/pci-dpc-quirk-pio-log-size-for-intel-ice-lake-root-ports.patch
new file mode 100644 (file)
index 0000000..a569669
--- /dev/null
+++ b/queue-5.10/pci-dpc-quirk-pio-log-size-for-intel-ice-lake-root-ports.patch
@@ -0,0 +1,57 @@
+From 3b8803494a0612acdeee714cb72aa142b1e05ce5 Mon Sep 17 00:00:00 2001
+From: Mika Westerberg <mika.westerberg@linux.intel.com>
+Date: Thu, 11 May 2023 15:19:05 +0300
+Subject: PCI/DPC: Quirk PIO log size for Intel Ice Lake Root Ports
+
+From: Mika Westerberg <mika.westerberg@linux.intel.com>
+
+commit 3b8803494a0612acdeee714cb72aa142b1e05ce5 upstream.
+
+Commit 5459c0b70467 ("PCI/DPC: Quirk PIO log size for certain Intel Root
+Ports") added quirks for Tiger and Alder Lake Root Ports but missed that
+the same issue exists also in the previous generation, Ice Lake.
+
+Apply the quirk for Ice Lake Root Ports as well.  This prevents kernel
+complaints like:
+
+  DPC: RP PIO log size 0 is invalid
+
+and also enables the DPC driver to dump the RP PIO Log registers when DPC
+is triggered.
+
+[bhelgaas: add dmesg warning and RP PIO Log dump info]
+Closes: https://bugzilla.kernel.org/show_bug.cgi?id=209943
+Link: https://lore.kernel.org/r/20230511121905.73949-1-mika.westerberg@linux.intel.com
+Reported-by: Mark Blakeney <mark.blakeney@bullet-systems.net>
+Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/pci/quirks.c |    9 +++++++--
+ 1 file changed, 7 insertions(+), 2 deletions(-)
+
+--- a/drivers/pci/quirks.c
++++ b/drivers/pci/quirks.c
+@@ -5912,8 +5912,9 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
+ 
+ #ifdef CONFIG_PCIE_DPC
+ /*
+- * Intel Tiger Lake and Alder Lake BIOS has a bug that clears the DPC
+- * RP PIO Log Size of the integrated Thunderbolt PCIe Root Ports.
++ * Intel Ice Lake, Tiger Lake and Alder Lake BIOS has a bug that clears
++ * the DPC RP PIO Log Size of the integrated Thunderbolt PCIe Root
++ * Ports.
+  */
+ static void dpc_log_size(struct pci_dev *dev)
+ {
+@@ -5936,6 +5937,10 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
+ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x462f, dpc_log_size);
+ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x463f, dpc_log_size);
+ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x466e, dpc_log_size);
++DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x8a1d, dpc_log_size);
++DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x8a1f, dpc_log_size);
++DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x8a21, dpc_log_size);
++DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x8a23, dpc_log_size);
+ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x9a23, dpc_log_size);
+ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x9a25, dpc_log_size);
+ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x9a27, dpc_log_size);

diff --git a/queue-5.10/series b/queue-5.10/series
index 8005db9f242816e7ec10749b00f95b9bc7c5b014..99e4e1a35b2cf17392568686c2548913f179066a 100644 (file)
--- a/queue-5.10/series
+++ b/queue-5.10/series
@@ -177,3 +177,4 @@ scsi-qla2xxx-split-fce-eft-trace-control.patch
 scsi-qla2xxx-fix-command-flush-on-cable-pull.patch
 scsi-qla2xxx-delay-i-o-abort-on-pci-error.patch
 x86-cpu-enable-stibp-on-amd-if-automatic-ibrs-is-enabled.patch
+pci-dpc-quirk-pio-log-size-for-intel-ice-lake-root-ports.patch