return fdtdec_setup_memory_banksize();
}
-int board_init(void)
-{
- return 0;
-}
-
+ /* Read the unique SoC ID from OTP registers */
+ static u64 get_chip_id(void)
+ {
+ void __iomem *otp_base;
+ u64 val;
+
+ otp_base = map_sysmem(EXYNOS850_OTP_BASE, 12);
+ val = readl(otp_base + OTP_CHIPID0);
+ val |= (u64)readl(otp_base + OTP_CHIPID1) << 32UL;
+ unmap_sysmem(otp_base);
+
+ return val;
+ }
+
+ static void setup_serial(void)
+ {
+ char serial_str[17] = { 0 };
+ u64 serial_num;
+
+ if (env_get("serial#"))
+ return;
+
+ serial_num = get_chip_id();
+ snprintf(serial_str, sizeof(serial_str), "%016llx", serial_num);
+ env_set("serial#", serial_str);
+ }
+
int board_late_init(void)
{
int err;