rs6000: Use bcdsub. instead of bcdadd. for bcd invalid number checking

bcdadd. might causes overflow which also set the overflow/invalid bit.
bcdsub. doesn't have the issue when do subtracting on two same bcd number.

gcc/
	* config/rs6000/altivec.md (*bcdinvalid_<mode>): Replace bcdadd
	with bcdsub.
	(bcdinvalid_<mode>): Likewise.

gcc/testsuite/
	* gcc.target/powerpc/bcd-4.c: Adjust the number of bcdadd and
	bcdsub.

diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index 4d4c94ff0a06863109ef6f5f0836130ff2cd9217..bb20441c096c47ff5915dc95e7d82684c40fba77 100644 (file)
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -4586,18 +4586,18 @@
   [(set (reg:CCFP CR6_REGNO)
        (compare:CCFP
         (unspec:V2DF [(match_operand:VBCD 1 "register_operand" "v")]
-                     UNSPEC_BCDADD)
+                     UNSPEC_BCDSUB)
         (match_operand:V2DF 2 "zero_constant" "j")))
    (clobber (match_scratch:VBCD 0 "=v"))]
   "TARGET_P8_VECTOR"
-  "bcdadd. %0,%1,%1,0"
+  "bcdsub. %0,%1,%1,0"
   [(set_attr "type" "vecsimple")])
 
 (define_expand "bcdinvalid_<mode>"
   [(parallel [(set (reg:CCFP CR6_REGNO)
                   (compare:CCFP
                    (unspec:V2DF [(match_operand:VBCD 1 "register_operand")]
-                                UNSPEC_BCDADD)
+                                UNSPEC_BCDSUB)
                    (match_dup 2)))
              (clobber (match_scratch:VBCD 3))])
    (set (match_operand:SI 0 "register_operand")

diff --git a/gcc/testsuite/gcc.target/powerpc/bcd-4.c b/gcc/testsuite/gcc.target/powerpc/bcd-4.c
index 2c7041c4d329bc6ba820d91417b07c9174ed4319..6d2c59ef792e032f464e05584f30af00cc3c7bd9 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/bcd-4.c
+++ b/gcc/testsuite/gcc.target/powerpc/bcd-4.c
@@ -2,8 +2,8 @@
 /* { dg-require-effective-target int128 } */
 /* { dg-require-effective-target p9vector_hw } */
 /* { dg-options "-mdejagnu-cpu=power9 -O2 -save-temps" } */
-/* { dg-final { scan-assembler-times {\mbcdadd\M} 7 } } */
-/* { dg-final { scan-assembler-times {\mbcdsub\M} 18 } } */
+/* { dg-final { scan-assembler-times {\mbcdadd\M} 5 } } */
+/* { dg-final { scan-assembler-times {\mbcdsub\M} 20 } } */
 /* { dg-final { scan-assembler-times {\mbcds\M} 2 } } */
 /* { dg-final { scan-assembler-times {\mdenbcdq\M} 1 } } */