--- /dev/null
+From 568dca15aa2a0f4ddee255894ec393a159f13147 Mon Sep 17 00:00:00 2001
+From: Stephen Boyd <sboyd@codeaurora.org>
+Date: Mon, 14 Jan 2013 19:50:42 +0100
+Subject: ARM: 7627/1: Predicate preempt logic on PREEMP_COUNT not PREEMPT alone
+
+From: Stephen Boyd <sboyd@codeaurora.org>
+
+commit 568dca15aa2a0f4ddee255894ec393a159f13147 upstream.
+
+Patrik Kluba reports that the preempt count becomes invalid due
+to the preempt_enable() call being unbalanced with a
+preempt_disable() call in the vfp assembly routines. This happens
+because preempt_enable() and preempt_disable() update preempt
+counts under PREEMPT_COUNT=y but the vfp assembly routines do so
+under PREEMPT=y. In a configuration where PREEMPT=n and
+DEBUG_ATOMIC_SLEEP=y, PREEMPT_COUNT=y and so the preempt_enable()
+call in VFP_bounce() keeps subtracting from the preempt count
+until it goes negative.
+
+Fix this by always using PREEMPT_COUNT to decided when to update
+preempt counts in the ARM assembly code.
+
+Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
+Reported-by: Patrik Kluba <pkluba@dension.com>
+Tested-by: Patrik Kluba <pkluba@dension.com>
+Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/vfp/entry.S | 6 +++---
+ arch/arm/vfp/vfphw.S | 4 ++--
+ 2 files changed, 5 insertions(+), 5 deletions(-)
+
+--- a/arch/arm/vfp/entry.S
++++ b/arch/arm/vfp/entry.S
+@@ -22,7 +22,7 @@
+ @ IRQs disabled.
+ @
+ ENTRY(do_vfp)
+-#ifdef CONFIG_PREEMPT
++#ifdef CONFIG_PREEMPT_COUNT
+ ldr r4, [r10, #TI_PREEMPT] @ get preempt count
+ add r11, r4, #1 @ increment it
+ str r11, [r10, #TI_PREEMPT]
+@@ -35,7 +35,7 @@ ENTRY(do_vfp)
+ ENDPROC(do_vfp)
+
+ ENTRY(vfp_null_entry)
+-#ifdef CONFIG_PREEMPT
++#ifdef CONFIG_PREEMPT_COUNT
+ get_thread_info r10
+ ldr r4, [r10, #TI_PREEMPT] @ get preempt count
+ sub r11, r4, #1 @ decrement it
+@@ -53,7 +53,7 @@ ENDPROC(vfp_null_entry)
+
+ __INIT
+ ENTRY(vfp_testing_entry)
+-#ifdef CONFIG_PREEMPT
++#ifdef CONFIG_PREEMPT_COUNT
+ get_thread_info r10
+ ldr r4, [r10, #TI_PREEMPT] @ get preempt count
+ sub r11, r4, #1 @ decrement it
+--- a/arch/arm/vfp/vfphw.S
++++ b/arch/arm/vfp/vfphw.S
+@@ -168,7 +168,7 @@ vfp_hw_state_valid:
+ @ else it's one 32-bit instruction, so
+ @ always subtract 4 from the following
+ @ instruction address.
+-#ifdef CONFIG_PREEMPT
++#ifdef CONFIG_PREEMPT_COUNT
+ get_thread_info r10
+ ldr r4, [r10, #TI_PREEMPT] @ get preempt count
+ sub r11, r4, #1 @ decrement it
+@@ -192,7 +192,7 @@ look_for_VFP_exceptions:
+ @ not recognised by VFP
+
+ DBGSTR "not VFP"
+-#ifdef CONFIG_PREEMPT
++#ifdef CONFIG_PREEMPT_COUNT
+ get_thread_info r10
+ ldr r4, [r10, #TI_PREEMPT] @ get preempt count
+ sub r11, r4, #1 @ decrement it
--- /dev/null
+From 6f16f4998f98e42e3f2dedf663cfb691ff0324af Mon Sep 17 00:00:00 2001
+From: Nicolas Pitre <nicolas.pitre@linaro.org>
+Date: Tue, 15 Jan 2013 18:51:32 +0100
+Subject: ARM: 7628/1: head.S: map one extra section for the ATAG/DTB area
+
+From: Nicolas Pitre <nicolas.pitre@linaro.org>
+
+commit 6f16f4998f98e42e3f2dedf663cfb691ff0324af upstream.
+
+We currently use a temporary 1MB section aligned to a 1MB boundary for
+mapping the provided device tree until the final page table is created.
+However, if the device tree happens to cross that 1MB boundary, the end
+of it remains unmapped and the kernel crashes when it attempts to access
+it. Given no restriction on the location of that DTB, it could end up
+with only a few bytes mapped at the end of a section.
+
+Solve this issue by mapping two consecutive sections.
+
+Signed-off-by: Nicolas Pitre <nico@linaro.org>
+Tested-by: Sascha Hauer <s.hauer@pengutronix.de>
+Tested-by: Tomasz Figa <t.figa@samsung.com>
+Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/kernel/head.S | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/arch/arm/kernel/head.S
++++ b/arch/arm/kernel/head.S
+@@ -246,6 +246,7 @@ __create_page_tables:
+
+ /*
+ * Then map boot params address in r2 if specified.
++ * We map 2 sections in case the ATAGs/DTB crosses a section boundary.
+ */
+ mov r0, r2, lsr #SECTION_SHIFT
+ movs r0, r0, lsl #SECTION_SHIFT
+@@ -253,6 +254,8 @@ __create_page_tables:
+ addne r3, r3, #PAGE_OFFSET
+ addne r3, r4, r3, lsr #(SECTION_SHIFT - PMD_ORDER)
+ orrne r6, r7, r0
++ strne r6, [r3], #1 << PMD_ORDER
++ addne r6, r6, #1 << SECTION_SHIFT
+ strne r6, [r3]
+
+ #ifdef CONFIG_DEBUG_LL
--- /dev/null
+From 36224d0fe0f34cdde66a381708853ebadeac799c Mon Sep 17 00:00:00 2001
+From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sun, 23 Dec 2012 18:07:49 +0000
+Subject: ARM: at91: rm9200: remake the BGA as default version
+
+From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 36224d0fe0f34cdde66a381708853ebadeac799c upstream.
+
+Make BGA as the default version as we are supposed to just have
+to specify when we use the PQFP version.
+
+Issue was existing since commit:
+3e90772 (ARM: at91: fix at91rm9200 soc subtype handling).
+
+Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/mach-at91/setup.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/arch/arm/mach-at91/setup.c
++++ b/arch/arm/mach-at91/setup.c
+@@ -104,6 +104,8 @@ static void __init soc_detect(u32 dbgu_b
+ switch (socid) {
+ case ARCH_ID_AT91RM9200:
+ at91_soc_initdata.type = AT91_SOC_RM9200;
++ if (at91_soc_initdata.subtype == AT91_SOC_SUBTYPE_NONE)
++ at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA;
+ at91_boot_soc = at91rm9200_soc;
+ break;
+
--- /dev/null
+From 15653371c67c3fbe359ae37b720639dd4c7b42c5 Mon Sep 17 00:00:00 2001
+From: Russell King <rmk+kernel@arm.linux.org.uk>
+Date: Sat, 19 Jan 2013 11:05:57 +0000
+Subject: ARM: DMA: Fix struct page iterator in dma_cache_maint() to work with sparsemem
+
+From: Russell King <rmk+kernel@arm.linux.org.uk>
+
+commit 15653371c67c3fbe359ae37b720639dd4c7b42c5 upstream.
+
+Subhash Jadavani reported this partial backtrace:
+ Now consider this call stack from MMC block driver (this is on the ARMv7
+ based board):
+
+ [<c001b50c>] (v7_dma_inv_range+0x30/0x48) from [<c0017b8c>] (dma_cache_maint_page+0x1c4/0x24c)
+ [<c0017b8c>] (dma_cache_maint_page+0x1c4/0x24c) from [<c0017c28>] (___dma_page_cpu_to_dev+0x14/0x1c)
+ [<c0017c28>] (___dma_page_cpu_to_dev+0x14/0x1c) from [<c0017ff8>] (dma_map_sg+0x3c/0x114)
+
+This is caused by incrementing the struct page pointer, and running off
+the end of the sparsemem page array. Fix this by incrementing by pfn
+instead, and convert the pfn to a struct page.
+
+Suggested-by: James Bottomley <JBottomley@Parallels.com>
+Tested-by: Subhash Jadavani <subhashj@codeaurora.org>
+Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/mm/dma-mapping.c | 18 ++++++++++--------
+ 1 file changed, 10 insertions(+), 8 deletions(-)
+
+--- a/arch/arm/mm/dma-mapping.c
++++ b/arch/arm/mm/dma-mapping.c
+@@ -776,25 +776,27 @@ static void dma_cache_maint_page(struct
+ size_t size, enum dma_data_direction dir,
+ void (*op)(const void *, size_t, int))
+ {
++ unsigned long pfn;
++ size_t left = size;
++
++ pfn = page_to_pfn(page) + offset / PAGE_SIZE;
++ offset %= PAGE_SIZE;
++
+ /*
+ * A single sg entry may refer to multiple physically contiguous
+ * pages. But we still need to process highmem pages individually.
+ * If highmem is not configured then the bulk of this loop gets
+ * optimized out.
+ */
+- size_t left = size;
+ do {
+ size_t len = left;
+ void *vaddr;
+
++ page = pfn_to_page(pfn);
++
+ if (PageHighMem(page)) {
+- if (len + offset > PAGE_SIZE) {
+- if (offset >= PAGE_SIZE) {
+- page += offset / PAGE_SIZE;
+- offset %= PAGE_SIZE;
+- }
++ if (len + offset > PAGE_SIZE)
+ len = PAGE_SIZE - offset;
+- }
+ vaddr = kmap_high_get(page);
+ if (vaddr) {
+ vaddr += offset;
+@@ -811,7 +813,7 @@ static void dma_cache_maint_page(struct
+ op(vaddr, len, dir);
+ }
+ offset = 0;
+- page++;
++ pfn++;
+ left -= len;
+ } while (left);
+ }
--- /dev/null
+From 7662a9c60fee25d7234da4be6d8eab2b2ac88448 Mon Sep 17 00:00:00 2001
+From: Luciano Coelho <coelho@ti.com>
+Date: Mon, 21 Jan 2013 13:14:12 +0200
+Subject: ARM: OMAP2+: omap4-panda: add UART2 muxing for WiLink shared transport
+
+From: Luciano Coelho <coelho@ti.com>
+
+commit 7662a9c60fee25d7234da4be6d8eab2b2ac88448 upstream.
+
+Add the UART2 muxing data to the board file (this used to be,
+erroneously, done in the bootloader).
+
+Signed-off-by: Luciano Coelho <coelho@ti.com>
+Signed-off-by: Tony Lindgren <tony@atomide.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/mach-omap2/board-omap4panda.c | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+--- a/arch/arm/mach-omap2/board-omap4panda.c
++++ b/arch/arm/mach-omap2/board-omap4panda.c
+@@ -402,6 +402,12 @@ static struct omap_board_mux board_mux[]
+ OMAP_PULL_ENA),
+ OMAP4_MUX(ABE_MCBSP1_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+
++ /* UART2 - BT/FM/GPS shared transport */
++ OMAP4_MUX(UART2_CTS, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
++ OMAP4_MUX(UART2_RTS, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
++ OMAP4_MUX(UART2_RX, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
++ OMAP4_MUX(UART2_TX, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
++
+ { .reg_offset = OMAP_MUX_TERMINATOR },
+ };
+
--- /dev/null
+From b86dc0d8c12bbb9fed3f392c284bdc7114ce00c1 Mon Sep 17 00:00:00 2001
+From: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
+Date: Wed, 16 Jan 2013 15:49:53 -0800
+Subject: ARM: S3C64XX: Fix up IRQ mapping for balblair on Cragganmore
+
+From: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
+
+commit b86dc0d8c12bbb9fed3f392c284bdc7114ce00c1 upstream.
+
+We are using S3C_EINT(4) instead of S3C_EINT(5).
+
+Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
+Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
+Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/mach-s3c64xx/mach-crag6410-module.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/mach-s3c64xx/mach-crag6410-module.c
++++ b/arch/arm/mach-s3c64xx/mach-crag6410-module.c
+@@ -39,7 +39,7 @@ static struct spi_board_info wm1253_devs
+ .bus_num = 0,
+ .chip_select = 0,
+ .mode = SPI_MODE_0,
+- .irq = S3C_EINT(5),
++ .irq = S3C_EINT(4),
+ .controller_data = &wm0010_spi_csinfo,
+ },
+ };
--- /dev/null
+From a4a12e008e292a81d312659529b71be2026ab355 Mon Sep 17 00:00:00 2001
+From: Dave Martin <dave.martin@linaro.org>
+Date: Fri, 30 Nov 2012 11:56:05 +0000
+Subject: ARM: virt: Avoid bx instruction for compatibility with <=ARMv4
+
+From: Dave Martin <dave.martin@linaro.org>
+
+commit a4a12e008e292a81d312659529b71be2026ab355 upstream.
+
+Non-T variants of ARMv4 do not support the bx instruction.
+
+However, __hyp_stub_install is always called from the same
+instruction set used to build the bulk of the kernel, so bx should
+not be necessary.
+
+This patch uses the traditional "mov pc" instead of bx.
+
+Signed-off-by: Dave Martin <dave.martin@linaro.org>
+[will: fixed up remaining bx instruction]
+Signed-off-by: Will Deacon <will.deacon@arm.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/kernel/hyp-stub.S | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/arch/arm/kernel/hyp-stub.S
++++ b/arch/arm/kernel/hyp-stub.S
+@@ -99,7 +99,7 @@ ENTRY(__hyp_stub_install_secondary)
+ * immediately.
+ */
+ compare_cpu_mode_with_primary r4, r5, r6, r7
+- bxne lr
++ movne pc, lr
+
+ /*
+ * Once we have given up on one CPU, we do not try to install the
+@@ -111,7 +111,7 @@ ENTRY(__hyp_stub_install_secondary)
+ */
+
+ cmp r4, #HYP_MODE
+- bxne lr @ give up if the CPU is not in HYP mode
++ movne pc, lr @ give up if the CPU is not in HYP mode
+
+ /*
+ * Configure HSCTLR to set correct exception endianness/instruction set
+@@ -200,7 +200,7 @@ ENDPROC(__hyp_get_vectors)
+ @ fall through
+ ENTRY(__hyp_set_vectors)
+ __HVC(0)
+- bx lr
++ mov pc, lr
+ ENDPROC(__hyp_set_vectors)
+
+ #ifndef ZIMAGE
--- /dev/null
+From 6e484be1ccca3ea495db45900fd42aac8d49d754 Mon Sep 17 00:00:00 2001
+From: Marc Zyngier <marc.zyngier@arm.com>
+Date: Fri, 4 Jan 2013 17:44:14 +0000
+Subject: ARM: virt: boot secondary CPUs through the right entry point
+
+From: Marc Zyngier <marc.zyngier@arm.com>
+
+commit 6e484be1ccca3ea495db45900fd42aac8d49d754 upstream.
+
+Secondary CPUs should use the __hyp_stub_install_secondary entry
+point, so boot mode inconsistencies can be detected.
+
+Acked-by: Dave Martin <dave.martin@linaro.org>
+Reported-by: Ian Molton <ian.molton@collabora.co.uk>
+Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
+Signed-off-by: Will Deacon <will.deacon@arm.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/kernel/head.S | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/kernel/head.S
++++ b/arch/arm/kernel/head.S
+@@ -334,7 +334,7 @@ ENTRY(secondary_startup)
+ * as it has already been validated by the primary processor.
+ */
+ #ifdef CONFIG_ARM_VIRT_EXT
+- bl __hyp_stub_install
++ bl __hyp_stub_install_secondary
+ #endif
+ safe_svcmode_maskall r9
+
--- /dev/null
+From d01723479e6a6c70c83295f7847477a016d5e14a Mon Sep 17 00:00:00 2001
+From: Marc Zyngier <marc.zyngier@arm.com>
+Date: Fri, 4 Jan 2013 17:44:15 +0000
+Subject: ARM: virt: simplify __hyp_stub_install epilog
+
+From: Marc Zyngier <marc.zyngier@arm.com>
+
+commit d01723479e6a6c70c83295f7847477a016d5e14a upstream.
+
+__hyp_stub_install duplicates quite a bit of safe_svcmode_maskall
+by forcing the CPU back to SVC. This is unnecessary, as
+safe_svcmode_maskall is called just after.
+
+Furthermore, the way we build SPSR_hyp is buggy as we fail to mask
+the interrupts, leading to interesting behaviours on TC2 + UEFI.
+
+The fix is to simply remove this code and rely on safe_svcmode_maskall
+to do the right thing.
+
+Reviewed-by: Dave Martin <dave.martin@linaro.org>
+Reported-by: Harry Liebel <harry.liebel@arm.com>
+Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
+Signed-off-by: Will Deacon <will.deacon@arm.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/kernel/hyp-stub.S | 12 +++---------
+ 1 file changed, 3 insertions(+), 9 deletions(-)
+
+--- a/arch/arm/kernel/hyp-stub.S
++++ b/arch/arm/kernel/hyp-stub.S
+@@ -120,7 +120,8 @@ ENTRY(__hyp_stub_install_secondary)
+ * Eventually, CPU-specific code might be needed -- assume not for now
+ *
+ * This code relies on the "eret" instruction to synchronize the
+- * various coprocessor accesses.
++ * various coprocessor accesses. This is done when we switch to SVC
++ * (see safe_svcmode_maskall).
+ */
+ @ Now install the hypervisor stub:
+ adr r7, __hyp_stub_vectors
+@@ -155,14 +156,7 @@ THUMB( orr r7, #(1 << 30) ) @ HSCTLR.TE
+ 1:
+ #endif
+
+- bic r7, r4, #MODE_MASK
+- orr r7, r7, #SVC_MODE
+-THUMB( orr r7, r7, #PSR_T_BIT )
+- msr spsr_cxsf, r7 @ This is SPSR_hyp.
+-
+- __MSR_ELR_HYP(14) @ msr elr_hyp, lr
+- __ERET @ return, switching to SVC mode
+- @ The boot CPU mode is left in r4.
++ bx lr @ The boot CPU mode is left in r4.
+ ENDPROC(__hyp_stub_install_secondary)
+
+ __hyp_stub_do_trap:
--- /dev/null
+From dbccd791a3fbbdac12c33834b73beff3984988e9 Mon Sep 17 00:00:00 2001
+From: Szymon Janc <szymon.janc@tieto.com>
+Date: Tue, 11 Dec 2012 08:51:19 +0100
+Subject: Bluetooth: Fix sending HCI commands after reset
+
+From: Szymon Janc <szymon.janc@tieto.com>
+
+commit dbccd791a3fbbdac12c33834b73beff3984988e9 upstream.
+
+After sending reset command wait for its command complete event before
+sending next command. Some chips sends CC event for command received
+before reset if reset was send before chip replied with CC.
+
+This is also required by specification that host shall not send
+additional HCI commands before receiving CC for reset.
+
+< HCI Command: Reset (0x03|0x0003) plen 0 [hci0] 18.404612
+> HCI Event: Command Complete (0x0e) plen 4 [hci0] 18.405850
+ Write Extended Inquiry Response (0x03|0x0052) ncmd 1
+ Status: Success (0x00)
+< HCI Command: Read Local Supported Features (0x04|0x0003) plen 0 [hci0] 18.406079
+> HCI Event: Command Complete (0x0e) plen 4 [hci0] 18.407864
+ Reset (0x03|0x0003) ncmd 1
+ Status: Success (0x00)
+< HCI Command: Read Local Supported Features (0x04|0x0003) plen 0 [hci0] 18.408062
+> HCI Event: Command Complete (0x0e) plen 12 [hci0] 18.408835
+
+Signed-off-by: Szymon Janc <szymon.janc@tieto.com>
+Acked-by: Johan Hedberg <johan.hedberg@intel.com>
+Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ net/bluetooth/hci_event.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/net/bluetooth/hci_event.c
++++ b/net/bluetooth/hci_event.c
+@@ -2394,7 +2394,7 @@ static void hci_cmd_complete_evt(struct
+ if (ev->opcode != HCI_OP_NOP)
+ del_timer(&hdev->cmd_timer);
+
+- if (ev->ncmd) {
++ if (ev->ncmd && !test_bit(HCI_RESET, &hdev->flags)) {
+ atomic_set(&hdev->cmd_cnt, 1);
+ if (!skb_queue_empty(&hdev->cmd_q))
+ queue_work(hdev->workqueue, &hdev->cmd_work);
--- /dev/null
+From e521a29014794d139cca46396d1af8faf1295a26 Mon Sep 17 00:00:00 2001
+From: Jerome Glisse <jglisse@redhat.com>
+Date: Mon, 21 Jan 2013 15:50:03 -0500
+Subject: drm/radeon: fix cursor corruption on DCE6 and newer
+
+From: Jerome Glisse <jglisse@redhat.com>
+
+commit e521a29014794d139cca46396d1af8faf1295a26 upstream.
+
+Aruba and newer gpu does not need the avivo cursor work around,
+quite the opposite this work around lead to corruption.
+
+agd5f: check DCE6 rather than ARUBA since the issue is DCE
+version specific rather than family specific.
+
+Signed-off-by: Jerome Glisse <jglisse@redhat.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/radeon_cursor.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/radeon/radeon_cursor.c
++++ b/drivers/gpu/drm/radeon/radeon_cursor.c
+@@ -240,7 +240,8 @@ int radeon_crtc_cursor_move(struct drm_c
+ y = 0;
+ }
+
+- if (ASIC_IS_AVIVO(rdev)) {
++ /* fixed on DCE6 and newer */
++ if (ASIC_IS_AVIVO(rdev) && !ASIC_IS_DCE6(rdev)) {
+ int i = 0;
+ struct drm_crtc *crtc_p;
+
--- /dev/null
+From 1f0529b4d80ad02df637be67ed4f82e93b8db32f Mon Sep 17 00:00:00 2001
+From: Linus Walleij <linus.walleij@stericsson.com>
+Date: Wed, 2 Jan 2013 14:40:14 +0100
+Subject: mfd: tc3589x: Use simple irqdomain
+
+From: Linus Walleij <linus.walleij@stericsson.com>
+
+commit 1f0529b4d80ad02df637be67ed4f82e93b8db32f upstream.
+
+This fixes a regression in the TC3589x driver introduced in
+commit 15e27b1088245a2de3b7d09d39cd209212eb16af
+"mfd: Provide the tc3589x with its own IRQ domain"
+
+If a system with a TC3589x expander is booted and a base
+IRQ is passed from platform data, a legacy domain will
+be used. However, since the Ux500 is now switched to use
+SPARSE_IRQ, no descriptors get allocated on-the-fly,
+and we get a crash.
+
+Fix this by switching to using the simple irqdomain that
+will handle this uniformly and also allocates descriptors
+explicitly.
+
+Also fix two small whitespace errors in the vicinity while
+we're at it.
+
+Acked-by: Lee Jones <lee.jones@linaro.org>
+Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
+Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mfd/tc3589x.c | 17 +++++------------
+ 1 file changed, 5 insertions(+), 12 deletions(-)
+
+--- a/drivers/mfd/tc3589x.c
++++ b/drivers/mfd/tc3589x.c
+@@ -219,25 +219,18 @@ static void tc3589x_irq_unmap(struct irq
+ }
+
+ static struct irq_domain_ops tc3589x_irq_ops = {
+- .map = tc3589x_irq_map,
++ .map = tc3589x_irq_map,
+ .unmap = tc3589x_irq_unmap,
+- .xlate = irq_domain_xlate_twocell,
++ .xlate = irq_domain_xlate_twocell,
+ };
+
+ static int tc3589x_irq_init(struct tc3589x *tc3589x, struct device_node *np)
+ {
+ int base = tc3589x->irq_base;
+
+- if (base) {
+- tc3589x->domain = irq_domain_add_legacy(
+- NULL, TC3589x_NR_INTERNAL_IRQS, base,
+- 0, &tc3589x_irq_ops, tc3589x);
+- }
+- else {
+- tc3589x->domain = irq_domain_add_linear(
+- np, TC3589x_NR_INTERNAL_IRQS,
+- &tc3589x_irq_ops, tc3589x);
+- }
++ tc3589x->domain = irq_domain_add_simple(
++ np, TC3589x_NR_INTERNAL_IRQS, base,
++ &tc3589x_irq_ops, tc3589x);
+
+ if (!tc3589x->domain) {
+ dev_err(tc3589x->dev, "Failed to create irqdomain\n");
fs-cifs-cifs_dfs_ref.c-fix-potential-memory-leakage.patch
kvm-ppc-emulate-dcbf.patch
powerpc-book3e-disable-interrupt-after-preempt_schedule_irq.patch
+arm-dma-fix-struct-page-iterator-in-dma_cache_maint-to-work-with-sparsemem.patch
+arm-omap2-omap4-panda-add-uart2-muxing-for-wilink-shared-transport.patch
+arm-at91-rm9200-remake-the-bga-as-default-version.patch
+arm-s3c64xx-fix-up-irq-mapping-for-balblair-on-cragganmore.patch
+arm-7627-1-predicate-preempt-logic-on-preemp_count-not-preempt-alone.patch
+arm-7628-1-head.s-map-one-extra-section-for-the-atag-dtb-area.patch
+arm-virt-avoid-bx-instruction-for-compatibility-with-armv4.patch
+arm-virt-boot-secondary-cpus-through-the-right-entry-point.patch
+arm-virt-simplify-__hyp_stub_install-epilog.patch
+mfd-tc3589x-use-simple-irqdomain.patch
+bluetooth-fix-sending-hci-commands-after-reset.patch
+drm-radeon-fix-cursor-corruption-on-dce6-and-newer.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
