--- /dev/null
+From d65cdf3319893464f45e3dd6165425e69f545b5b Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Mon, 28 Apr 2025 23:56:14 -0400
+Subject: do_umount(): add missing barrier before refcount checks in sync case
+
+From: Al Viro <viro@zeniv.linux.org.uk>
+
+[ Upstream commit 65781e19dcfcb4aed1167d87a3ffcc2a0c071d47 ]
+
+do_umount() analogue of the race fixed in 119e1ef80ecf "fix
+__legitimize_mnt()/mntput() race". Here we want to make sure that
+if __legitimize_mnt() doesn't notice our lock_mount_hash(), we will
+notice their refcount increment. Harder to hit than mntput_no_expire()
+one, fortunately, and consequences are milder (sync umount acting
+like umount -l on a rare race with RCU pathwalk hitting at just the
+wrong time instead of use-after-free galore mntput_no_expire()
+counterpart used to be hit). Still a bug...
+
+Fixes: 48a066e72d97 ("RCU'd vfsmounts")
+Reviewed-by: Christian Brauner <brauner@kernel.org>
+Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ fs/namespace.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/fs/namespace.c b/fs/namespace.c
+index 5a885d35efe93..450f4198b8cdd 100644
+--- a/fs/namespace.c
++++ b/fs/namespace.c
+@@ -633,7 +633,7 @@ int __legitimize_mnt(struct vfsmount *bastard, unsigned seq)
+ return 0;
+ mnt = real_mount(bastard);
+ mnt_add_count(mnt, 1);
+- smp_mb(); // see mntput_no_expire()
++ smp_mb(); // see mntput_no_expire() and do_umount()
+ if (likely(!read_seqretry(&mount_lock, seq)))
+ return 0;
+ if (bastard->mnt_flags & MNT_SYNC_UMOUNT) {
+@@ -1786,6 +1786,7 @@ static int do_umount(struct mount *mnt, int flags)
+ umount_tree(mnt, UMOUNT_PROPAGATE);
+ retval = 0;
+ } else {
++ smp_mb(); // paired with __legitimize_mnt()
+ shrink_submounts(mnt);
+ retval = -EBUSY;
+ if (!propagate_mount_busy(mnt, 2)) {
+--
+2.39.5
+
--- /dev/null
+From d61cb7539246873927f165df7eaaae9690d35846 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Mon, 5 May 2025 12:02:56 -0500
+Subject: drm/panel: simple: Update timings for AUO G101EVN010
+
+From: Kevin Baker <kevinb@ventureresearch.com>
+
+[ Upstream commit 7c6fa1797a725732981f2d77711c867166737719 ]
+
+Switch to panel timings based on datasheet for the AUO G101EVN01.0
+LVDS panel. Default timings were tested on the panel.
+
+Previous mode-based timings resulted in horizontal display shift.
+
+Signed-off-by: Kevin Baker <kevinb@ventureresearch.com>
+Fixes: 4fb86404a977 ("drm/panel: simple: Add AUO G101EVN010 panel support")
+Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
+Link: https://lore.kernel.org/r/20250505170256.1385113-1-kevinb@ventureresearch.com
+Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
+Link: https://lore.kernel.org/r/20250505170256.1385113-1-kevinb@ventureresearch.com
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/gpu/drm/panel/panel-simple.c | 25 +++++++++++++------------
+ 1 file changed, 13 insertions(+), 12 deletions(-)
+
+diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
+index 37fe54c34b141..0d69098eddd90 100644
+--- a/drivers/gpu/drm/panel/panel-simple.c
++++ b/drivers/gpu/drm/panel/panel-simple.c
+@@ -979,27 +979,28 @@ static const struct panel_desc auo_g070vvn01 = {
+ },
+ };
+
+-static const struct drm_display_mode auo_g101evn010_mode = {
+- .clock = 68930,
+- .hdisplay = 1280,
+- .hsync_start = 1280 + 82,
+- .hsync_end = 1280 + 82 + 2,
+- .htotal = 1280 + 82 + 2 + 84,
+- .vdisplay = 800,
+- .vsync_start = 800 + 8,
+- .vsync_end = 800 + 8 + 2,
+- .vtotal = 800 + 8 + 2 + 6,
++static const struct display_timing auo_g101evn010_timing = {
++ .pixelclock = { 64000000, 68930000, 85000000 },
++ .hactive = { 1280, 1280, 1280 },
++ .hfront_porch = { 8, 64, 256 },
++ .hback_porch = { 8, 64, 256 },
++ .hsync_len = { 40, 168, 767 },
++ .vactive = { 800, 800, 800 },
++ .vfront_porch = { 4, 8, 100 },
++ .vback_porch = { 4, 8, 100 },
++ .vsync_len = { 8, 16, 223 },
+ };
+
+ static const struct panel_desc auo_g101evn010 = {
+- .modes = &auo_g101evn010_mode,
+- .num_modes = 1,
++ .timings = &auo_g101evn010_timing,
++ .num_timings = 1,
+ .bpc = 6,
+ .size = {
+ .width = 216,
+ .height = 135,
+ },
+ .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,
++ .bus_flags = DRM_BUS_FLAG_DE_HIGH,
+ .connector_type = DRM_MODE_CONNECTOR_LVDS,
+ };
+
+--
+2.39.5
+
--- /dev/null
+From 70279339a454ce4c76a03eeaaea354ff483c302f Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Sun, 13 Apr 2025 11:34:27 +0100
+Subject: iio: accel: adxl355: Make timestamp 64-bit aligned using aligned_s64
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+
+[ Upstream commit 1bb942287e05dc4c304a003ea85e6dd9a5e7db39 ]
+
+The IIO ABI requires 64-bit aligned timestamps. In this case insufficient
+padding would have been added on architectures where an s64 is only 32-bit
+aligned. Use aligned_s64 to enforce the correct alignment.
+
+Fixes: 327a0eaf19d5 ("iio: accel: adxl355: Add triggered buffer support")
+Reported-by: David Lechner <dlechner@baylibre.com>
+Reviewed-by: Nuno Sá <nuno.sa@analog.com>
+Reviewed-by: David Lechner <dlechner@baylibre.com>
+Link: https://patch.msgid.link/20250413103443.2420727-5-jic23@kernel.org
+Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/iio/accel/adxl355_core.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/iio/accel/adxl355_core.c b/drivers/iio/accel/adxl355_core.c
+index 0c9225d18fb29..4973e8da5399d 100644
+--- a/drivers/iio/accel/adxl355_core.c
++++ b/drivers/iio/accel/adxl355_core.c
+@@ -231,7 +231,7 @@ struct adxl355_data {
+ u8 transf_buf[3];
+ struct {
+ u8 buf[14];
+- s64 ts;
++ aligned_s64 ts;
+ } buffer;
+ } __aligned(IIO_DMA_MINALIGN);
+ };
+--
+2.39.5
+
--- /dev/null
+From 7b788c29dce13c5e9863bbf64a54ec288473ccff Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Sun, 9 Mar 2025 19:35:15 +0000
+Subject: iio: accel: adxl367: fix setting odr for activity time update
+
+From: Lothar Rubusch <l.rubusch@gmail.com>
+
+[ Upstream commit 38f67d0264929762e54ae5948703a21f841fe706 ]
+
+Fix setting the odr value to update activity time based on frequency
+derrived by recent odr, and not by obsolete odr value.
+
+The [small] bug: When _adxl367_set_odr() is called with a new odr value,
+it first writes the new odr value to the hardware register
+ADXL367_REG_FILTER_CTL.
+Second, it calls _adxl367_set_act_time_ms(), which calls
+adxl367_time_ms_to_samples(). Here st->odr still holds the old odr value.
+This st->odr member is used to derrive a frequency value, which is
+applied to update ADXL367_REG_TIME_ACT. Hence, the idea is to update
+activity time, based on possibilities and power consumption by the
+current ODR rate.
+Finally, when the function calls return, again in _adxl367_set_odr() the
+new ODR is assigned to st->odr.
+
+The fix: When setting a new ODR value is set to ADXL367_REG_FILTER_CTL,
+also ADXL367_REG_TIME_ACT should probably be updated with a frequency
+based on the recent ODR value and not the old one. Changing the location
+of the assignment to st->odr fixes this.
+
+Fixes: cbab791c5e2a5 ("iio: accel: add ADXL367 driver")
+Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com>
+Reviewed-by: Marcelo Schmitt <marcelo.schmitt1@gmail.com>
+Link: https://patch.msgid.link/20250309193515.2974-1-l.rubusch@gmail.com
+Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/iio/accel/adxl367.c | 10 +++-------
+ 1 file changed, 3 insertions(+), 7 deletions(-)
+
+diff --git a/drivers/iio/accel/adxl367.c b/drivers/iio/accel/adxl367.c
+index 484fe2e9fb174..3a55475691de3 100644
+--- a/drivers/iio/accel/adxl367.c
++++ b/drivers/iio/accel/adxl367.c
+@@ -620,18 +620,14 @@ static int _adxl367_set_odr(struct adxl367_state *st, enum adxl367_odr odr)
+ if (ret)
+ return ret;
+
++ st->odr = odr;
++
+ /* Activity timers depend on ODR */
+ ret = _adxl367_set_act_time_ms(st, st->act_time_ms);
+ if (ret)
+ return ret;
+
+- ret = _adxl367_set_inact_time_ms(st, st->inact_time_ms);
+- if (ret)
+- return ret;
+-
+- st->odr = odr;
+-
+- return 0;
++ return _adxl367_set_inact_time_ms(st, st->inact_time_ms);
+ }
+
+ static int adxl367_set_odr(struct iio_dev *indio_dev, enum adxl367_odr odr)
+--
+2.39.5
+
--- /dev/null
+From fe16ea0e8f3c4c93954a75e8326bf8b1f6ac850d Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Sun, 13 Apr 2025 11:34:26 +0100
+Subject: iio: adc: dln2: Use aligned_s64 for timestamp
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+
+[ Upstream commit 5097eaae98e53f9ab9d35801c70da819b92ca907 ]
+
+Here the lack of marking allows the overall structure to not be
+sufficiently aligned resulting in misplacement of the timestamp
+in iio_push_to_buffers_with_timestamp(). Use aligned_s64 to
+force the alignment on all architectures.
+
+Fixes: 7c0299e879dd ("iio: adc: Add support for DLN2 ADC")
+Reported-by: David Lechner <dlechner@baylibre.com>
+Reviewed-by: Andy Shevchenko <andy@kernel.org>
+Reviewed-by: Nuno Sá <nuno.sa@analog.com>
+Reviewed-by: David Lechner <dlechner@baylibre.com>
+Link: https://patch.msgid.link/20250413103443.2420727-4-jic23@kernel.org
+Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/iio/adc/dln2-adc.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/iio/adc/dln2-adc.c b/drivers/iio/adc/dln2-adc.c
+index 97d162a3cba4e..49a2588e7431e 100644
+--- a/drivers/iio/adc/dln2-adc.c
++++ b/drivers/iio/adc/dln2-adc.c
+@@ -483,7 +483,7 @@ static irqreturn_t dln2_adc_trigger_h(int irq, void *p)
+ struct iio_dev *indio_dev = pf->indio_dev;
+ struct {
+ __le16 values[DLN2_ADC_MAX_CHANNELS];
+- int64_t timestamp_space;
++ aligned_s64 timestamp_space;
+ } data;
+ struct dln2_adc_get_all_vals dev_data;
+ struct dln2_adc *dln2 = iio_priv(indio_dev);
+--
+2.39.5
+
--- /dev/null
+From e78196b820928d24b5601d63a0b4999d19638c95 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Sun, 13 Apr 2025 11:34:36 +0100
+Subject: iio: temp: maxim-thermocouple: Fix potential lack of DMA safe buffer.
+
+From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+
+[ Upstream commit f79aeb6c631b57395f37acbfbe59727e355a714c ]
+
+The trick of using __aligned(IIO_DMA_MINALIGN) ensures that there is
+no overlap between buffers used for DMA and those used for driver
+state storage that are before the marking. It doesn't ensure
+anything above state variables found after the marking. Hence
+move this particular bit of state earlier in the structure.
+
+Fixes: 10897f34309b ("iio: temp: maxim_thermocouple: Fix alignment for DMA safety")
+Reviewed-by: David Lechner <dlechner@baylibre.com>
+Link: https://patch.msgid.link/20250413103443.2420727-14-jic23@kernel.org
+Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/iio/temperature/maxim_thermocouple.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/iio/temperature/maxim_thermocouple.c b/drivers/iio/temperature/maxim_thermocouple.c
+index c28a7a6dea5f1..555a61e2f3fdd 100644
+--- a/drivers/iio/temperature/maxim_thermocouple.c
++++ b/drivers/iio/temperature/maxim_thermocouple.c
+@@ -121,9 +121,9 @@ static const struct maxim_thermocouple_chip maxim_thermocouple_chips[] = {
+ struct maxim_thermocouple_data {
+ struct spi_device *spi;
+ const struct maxim_thermocouple_chip *chip;
++ char tc_type;
+
+ u8 buffer[16] __aligned(IIO_DMA_MINALIGN);
+- char tc_type;
+ };
+
+ static int maxim_thermocouple_read(struct maxim_thermocouple_data *data,
+--
+2.39.5
+
--- /dev/null
+From fe3ef46a2945f2660fc308525a43d4541c1c44d7 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Thu, 3 Apr 2025 18:11:42 +0200
+Subject: MIPS: Fix idle VS timer enqueue
+
+From: Marco Crivellari <marco.crivellari@suse.com>
+
+[ Upstream commit 56651128e2fbad80f632f388d6bf1f39c928267a ]
+
+MIPS re-enables interrupts on its idle routine and performs
+a TIF_NEED_RESCHED check afterwards before putting the CPU to sleep.
+
+The IRQs firing between the check and the 'wait' instruction may set the
+TIF_NEED_RESCHED flag. In order to deal with this possible race, IRQs
+interrupting __r4k_wait() rollback their return address to the
+beginning of __r4k_wait() so that TIF_NEED_RESCHED is checked
+again before going back to sleep.
+
+However idle IRQs can also queue timers that may require a tick
+reprogramming through a new generic idle loop iteration but those timers
+would go unnoticed here because __r4k_wait() only checks
+TIF_NEED_RESCHED. It doesn't check for pending timers.
+
+Fix this with fast-forwarding idle IRQs return address to the end of the
+idle routine instead of the beginning, so that the generic idle loop
+handles both TIF_NEED_RESCHED and pending timers.
+
+CONFIG_CPU_MICROMIPS has been removed along with the nop instructions.
+There, NOPs are 2 byte in size, so change the code with 3 _ssnop which are
+always 4 byte and remove the ifdef. Added ehb to make sure the hazard
+is always cleared.
+
+Fixes: c65a5480ff29 ("[MIPS] Fix potential latency problem due to non-atomic cpu_wait.")
+Signed-off-by: Marco Crivellari <marco.crivellari@suse.com>
+Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk>
+Acked-by: Frederic Weisbecker <frederic@kernel.org>
+Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ arch/mips/include/asm/idle.h | 3 +-
+ arch/mips/kernel/genex.S | 62 +++++++++++++++++++++---------------
+ arch/mips/kernel/idle.c | 7 ----
+ 3 files changed, 37 insertions(+), 35 deletions(-)
+
+diff --git a/arch/mips/include/asm/idle.h b/arch/mips/include/asm/idle.h
+index 0992cad9c632e..2bc3678455ed0 100644
+--- a/arch/mips/include/asm/idle.h
++++ b/arch/mips/include/asm/idle.h
+@@ -6,8 +6,7 @@
+ #include <linux/linkage.h>
+
+ extern void (*cpu_wait)(void);
+-extern void r4k_wait(void);
+-extern asmlinkage void __r4k_wait(void);
++extern asmlinkage void r4k_wait(void);
+ extern void r4k_wait_irqoff(void);
+
+ static inline int using_rollback_handler(void)
+diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
+index b6de8e88c1bd4..488275e4566d4 100644
+--- a/arch/mips/kernel/genex.S
++++ b/arch/mips/kernel/genex.S
+@@ -104,42 +104,52 @@ handle_vcei:
+
+ __FINIT
+
+- .align 5 /* 32 byte rollback region */
+-LEAF(__r4k_wait)
+- .set push
+- .set noreorder
+- /* start of rollback region */
+- LONG_L t0, TI_FLAGS($28)
+- nop
+- andi t0, _TIF_NEED_RESCHED
+- bnez t0, 1f
+- nop
+- nop
+- nop
+-#ifdef CONFIG_CPU_MICROMIPS
+- nop
+- nop
+- nop
+- nop
+-#endif
++ /* Align to 32 bytes for the maximum idle interrupt region size. */
++ .align 5
++LEAF(r4k_wait)
++ /* Keep the ISA bit clear for calculations on local labels here. */
++0: .fill 0
++ /* Start of idle interrupt region. */
++ local_irq_enable
++ /*
++ * If an interrupt lands here, before going idle on the next
++ * instruction, we must *NOT* go idle since the interrupt could
++ * have set TIF_NEED_RESCHED or caused a timer to need resched.
++ * Fall through -- see rollback_handler below -- and have the
++ * idle loop take care of things.
++ */
++1: .fill 0
++ /* The R2 EI/EHB sequence takes 8 bytes, otherwise pad up. */
++ .if 1b - 0b > 32
++ .error "overlong idle interrupt region"
++ .elseif 1b - 0b > 8
++ .align 4
++ .endif
++2: .fill 0
++ .equ r4k_wait_idle_size, 2b - 0b
++ /* End of idle interrupt region; size has to be a power of 2. */
+ .set MIPS_ISA_ARCH_LEVEL_RAW
++r4k_wait_insn:
+ wait
+- /* end of rollback region (the region size must be power of two) */
+-1:
++r4k_wait_exit:
++ .set mips0
++ local_irq_disable
+ jr ra
+- nop
+- .set pop
+- END(__r4k_wait)
++ END(r4k_wait)
++ .previous
+
+ .macro BUILD_ROLLBACK_PROLOGUE handler
+ FEXPORT(rollback_\handler)
+ .set push
+ .set noat
+ MFC0 k0, CP0_EPC
+- PTR_LA k1, __r4k_wait
+- ori k0, 0x1f /* 32 byte rollback region */
+- xori k0, 0x1f
++ /* Subtract/add 2 to let the ISA bit propagate through the mask. */
++ PTR_LA k1, r4k_wait_insn - 2
++ ori k0, r4k_wait_idle_size - 2
++ .set noreorder
+ bne k0, k1, \handler
++ PTR_ADDIU k0, r4k_wait_exit - r4k_wait_insn + 2
++ .set reorder
+ MTC0 k0, CP0_EPC
+ .set pop
+ .endm
+diff --git a/arch/mips/kernel/idle.c b/arch/mips/kernel/idle.c
+index 5abc8b7340f88..80e8a04a642e0 100644
+--- a/arch/mips/kernel/idle.c
++++ b/arch/mips/kernel/idle.c
+@@ -35,13 +35,6 @@ static void __cpuidle r3081_wait(void)
+ write_c0_conf(cfg | R30XX_CONF_HALT);
+ }
+
+-void __cpuidle r4k_wait(void)
+-{
+- raw_local_irq_enable();
+- __r4k_wait();
+- raw_local_irq_disable();
+-}
+-
+ /*
+ * This variant is preferable as it allows testing need_resched and going to
+ * sleep depending on the outcome atomically. Unfortunately the "It is
+--
+2.39.5
+
--- /dev/null
+From ace83b7bb7a6ea6cccdfa2e06d6af16def42b0bd Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Sun, 27 Apr 2025 13:34:24 +0200
+Subject: MIPS: Fix MAX_REG_OFFSET
+
+From: Thorsten Blum <thorsten.blum@linux.dev>
+
+[ Upstream commit c44572e0cc13c9afff83fd333135a0aa9b27ba26 ]
+
+Fix MAX_REG_OFFSET to point to the last register in 'pt_regs' and not to
+the marker itself, which could allow regs_get_register() to return an
+invalid offset.
+
+Fixes: 40e084a506eb ("MIPS: Add uprobes support.")
+Suggested-by: Maciej W. Rozycki <macro@orcam.me.uk>
+Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev>
+Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ arch/mips/include/asm/ptrace.h | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/arch/mips/include/asm/ptrace.h b/arch/mips/include/asm/ptrace.h
+index 4a2b40ce39e09..841612913f0d1 100644
+--- a/arch/mips/include/asm/ptrace.h
++++ b/arch/mips/include/asm/ptrace.h
+@@ -65,7 +65,8 @@ static inline void instruction_pointer_set(struct pt_regs *regs,
+
+ /* Query offset/name of register from its name/offset */
+ extern int regs_query_register_offset(const char *name);
+-#define MAX_REG_OFFSET (offsetof(struct pt_regs, __last))
++#define MAX_REG_OFFSET \
++ (offsetof(struct pt_regs, __last) - sizeof(unsigned long))
+
+ /**
+ * regs_get_register() - get register value from its offset
+--
+2.39.5
+
--- /dev/null
+From 041cc52e09ed055a266f7cc344b9c135a449f7dc Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Thu, 3 Apr 2025 18:11:43 +0200
+Subject: MIPS: Move r4k_wait() to .cpuidle.text section
+
+From: Marco Crivellari <marco.crivellari@suse.com>
+
+[ Upstream commit b713f27e32d87c35737ec942dd6f5ed6b7475f48 ]
+
+Fix missing .cpuidle.text section assignment for r4k_wait() to correct
+backtracing with nmi_backtrace().
+
+Fixes: 97c8580e85cf ("MIPS: Annotate cpu_wait implementations with __cpuidle")
+Signed-off-by: Marco Crivellari <marco.crivellari@suse.com>
+Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk>
+Acked-by: Frederic Weisbecker <frederic@kernel.org>
+Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ arch/mips/kernel/genex.S | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
+index 488275e4566d4..f4cf3fcd337e1 100644
+--- a/arch/mips/kernel/genex.S
++++ b/arch/mips/kernel/genex.S
+@@ -104,6 +104,7 @@ handle_vcei:
+
+ __FINIT
+
++ .section .cpuidle.text,"ax"
+ /* Align to 32 bytes for the maximum idle interrupt region size. */
+ .align 5
+ LEAF(r4k_wait)
+--
+2.39.5
+
--- /dev/null
+From 5214bfa3edc523b9f0f8c49a88ecf27e13261f29 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Fri, 2 May 2025 10:58:00 +0200
+Subject: nvme: unblock ctrl state transition for firmware update
+
+From: Daniel Wagner <wagi@kernel.org>
+
+[ Upstream commit 650415fca0a97472fdd79725e35152614d1aad76 ]
+
+The original nvme subsystem design didn't have a CONNECTING state; the
+state machine allowed transitions from RESETTING to LIVE directly.
+
+With the introduction of nvme fabrics the CONNECTING state was
+introduce. Over time the nvme-pci started to use the CONNECTING state as
+well.
+
+Eventually, a bug fix for the nvme-fc started to depend that the only
+valid transition to LIVE was from CONNECTING. Though this change didn't
+update the firmware update handler which was still depending on
+RESETTING to LIVE transition.
+
+The simplest way to address it for the time being is to switch into
+CONNECTING state before going to LIVE state.
+
+Fixes: d2fe192348f9 ("nvme: only allow entering LIVE from CONNECTING state")
+Reported-by: Guenter Roeck <linux@roeck-us.net>
+Signed-off-by: Daniel Wagner <wagi@kernel.org>
+Closes: https://lore.kernel.org/all/0134ea15-8d5f-41f7-9e9a-d7e6d82accaa@roeck-us.net
+Reviewed-by: Keith Busch <kbusch@kernel.org>
+Reviewed-by: Sagi Grimberg <sagi@grimberg.me>
+Reviewed-by: Guenter Roeck <linux@roeck-us.net>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/nvme/host/core.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/nvme/host/core.c b/drivers/nvme/host/core.c
+index c6b0637e61deb..6e2d0fda3ba4a 100644
+--- a/drivers/nvme/host/core.c
++++ b/drivers/nvme/host/core.c
+@@ -4156,7 +4156,8 @@ static void nvme_fw_act_work(struct work_struct *work)
+ msleep(100);
+ }
+
+- if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE))
++ if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_CONNECTING) ||
++ !nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE))
+ return;
+
+ nvme_unquiesce_io_queues(ctrl);
+--
+2.39.5
+
usb-usbtmc-fix-erroneous-get_stb-ioctl-error-returns.patch
usb-usbtmc-fix-erroneous-wait_srq-ioctl-return.patch
usb-usbtmc-fix-erroneous-generic_read-ioctl-return.patch
+iio-accel-adxl367-fix-setting-odr-for-activity-time-.patch
+iio-temp-maxim-thermocouple-fix-potential-lack-of-dm.patch
+types-complement-the-aligned-types-with-signed-64-bi.patch
+iio-accel-adxl355-make-timestamp-64-bit-aligned-usin.patch
+iio-adc-dln2-use-aligned_s64-for-timestamp.patch
+mips-fix-idle-vs-timer-enqueue.patch
+mips-move-r4k_wait-to-.cpuidle.text-section.patch
+mips-fix-max_reg_offset.patch
+drm-panel-simple-update-timings-for-auo-g101evn010.patch
+nvme-unblock-ctrl-state-transition-for-firmware-upda.patch
+do_umount-add-missing-barrier-before-refcount-checks.patch
--- /dev/null
+From 32153786643387fb3d634b6783d736a88d364cec Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Tue, 3 Sep 2024 20:59:04 +0300
+Subject: types: Complement the aligned types with signed 64-bit one
+
+From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
+
+[ Upstream commit e4ca0e59c39442546866f3dd514a3a5956577daf ]
+
+Some user may want to use aligned signed 64-bit type.
+Provide it for them.
+
+Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
+Link: https://patch.msgid.link/20240903180218.3640501-2-andriy.shevchenko@linux.intel.com
+Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+Stable-dep-of: 1bb942287e05 ("iio: accel: adxl355: Make timestamp 64-bit aligned using aligned_s64")
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ include/linux/types.h | 3 ++-
+ include/uapi/linux/types.h | 1 +
+ 2 files changed, 3 insertions(+), 1 deletion(-)
+
+diff --git a/include/linux/types.h b/include/linux/types.h
+index 253168bb3fe15..78d87c751ff58 100644
+--- a/include/linux/types.h
++++ b/include/linux/types.h
+@@ -115,8 +115,9 @@ typedef u64 u_int64_t;
+ typedef s64 int64_t;
+ #endif
+
+-/* this is a special 64bit data type that is 8-byte aligned */
++/* These are the special 64-bit data types that are 8-byte aligned */
+ #define aligned_u64 __aligned_u64
++#define aligned_s64 __aligned_s64
+ #define aligned_be64 __aligned_be64
+ #define aligned_le64 __aligned_le64
+
+diff --git a/include/uapi/linux/types.h b/include/uapi/linux/types.h
+index 6375a06840520..48b933938877d 100644
+--- a/include/uapi/linux/types.h
++++ b/include/uapi/linux/types.h
+@@ -53,6 +53,7 @@ typedef __u32 __bitwise __wsum;
+ * No conversions are necessary between 32-bit user-space and a 64-bit kernel.
+ */
+ #define __aligned_u64 __u64 __attribute__((aligned(8)))
++#define __aligned_s64 __s64 __attribute__((aligned(8)))
+ #define __aligned_be64 __be64 __attribute__((aligned(8)))
+ #define __aligned_le64 __le64 __attribute__((aligned(8)))
+
+--
+2.39.5
+
projects / thirdparty / kernel / stable-queue.git / commitdiff
