Merge tag 'v6.16-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git...

Pull Rockchip clk driver updates from Heiko Stuebner:

 - Ability to handle different "General Register Files" syscons, not
   just a single system-one, plus ability to model individual gates
   found there.

 - For whatever reason Rockchip also moved the mmc-phase-clocks from the
   clock-unit for the GRF on some newer socs like the rk3528 (before
   moving them fully to the mmc controller itself on the rk3576), so add
   a new clock-variant for the phases, reusing the new GRF handling.

 - The old rk3036 got real handling of the usb480m mux and some PLL
   rates were added.

* tag 'v6.16-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  clk: rockchip: rk3528: add slab.h header include
  clk: rockchip: rk3576: add missing slab.h include
  clk: rockchip: rename gate-grf clk file
  clk: rockchip: rename branch_muxgrf to branch_grf_mux
  clk: rockchip: Pass NULL as reg pointer when registering GRF MMC clocks
  clk: rockchip: rk3036: mark ddrphy as critical
  clk: rockchip: rk3036: fix implementation of usb480m clock mux
  dt-bindings: clock: rk3036: add SCLK_USB480M clock-id
  clk: rockchip: rk3528: Add SD/SDIO tuning clocks in GRF region
  clk: rockchip: Support MMC clocks in GRF region
  dt-bindings: clock: Add GRF clock definition for RK3528
  clk: rockchip: add GATE_GRFs for SAI MCLKOUT to rk3576
  clk: rockchip: introduce GRF gates
  clk: rockchip: introduce auxiliary GRFs
  dt-bindings: clock: rk3576: add IOC gated clocks
  clk: rockchip: rk3568: Add PLL rate for 33.3MHz
  clk: rockchip: Drop empty init callback for rk3588 PLL type
  clk: rockchip: rk3588: Add PLL rate for 1500 MHz