--- /dev/null
+From 47f1204329237a0f8655f5a9f14a38ac81946ca1 Mon Sep 17 00:00:00 2001
+From: Will Deacon <will.deacon@arm.com>
+Date: Fri, 10 Aug 2012 17:51:18 +0100
+Subject: ARM: 7487/1: mm: avoid setting nG bit for user mappings that aren't present
+
+From: Will Deacon <will.deacon@arm.com>
+
+commit 47f1204329237a0f8655f5a9f14a38ac81946ca1 upstream.
+
+Swap entries are encoding in ptes such that !pte_present(pte) and
+pte_file(pte). The remaining bits of the descriptor are used to identify
+the swapfile and offset within it to the swap entry.
+
+When writing such a pte for a user virtual address, set_pte_at
+unconditionally sets the nG bit, which (in the case of LPAE) will
+corrupt the swapfile offset and lead to a BUG:
+
+[ 140.494067] swap_free: Unused swap offset entry 000763b4
+[ 140.509989] BUG: Bad page map in process rs:main Q:Reg pte:0ec76800 pmd:8f92e003
+
+This patch fixes the problem by only setting the nG bit for user
+mappings that are actually present.
+
+Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
+Signed-off-by: Will Deacon <will.deacon@arm.com>
+Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/include/asm/pgtable.h | 34 ++++++++++++++++++----------------
+ arch/arm/mm/flush.c | 2 --
+ 2 files changed, 18 insertions(+), 18 deletions(-)
+
+--- a/arch/arm/include/asm/pgtable.h
++++ b/arch/arm/include/asm/pgtable.h
+@@ -360,6 +360,18 @@ static inline pte_t *pmd_page_vaddr(pmd_
+ #define set_pte_ext(ptep,pte,ext) cpu_set_pte_ext(ptep,pte,ext)
+ #define pte_clear(mm,addr,ptep) set_pte_ext(ptep, __pte(0), 0)
+
++#define pte_none(pte) (!pte_val(pte))
++#define pte_present(pte) (pte_val(pte) & L_PTE_PRESENT)
++#define pte_write(pte) (!(pte_val(pte) & L_PTE_RDONLY))
++#define pte_dirty(pte) (pte_val(pte) & L_PTE_DIRTY)
++#define pte_young(pte) (pte_val(pte) & L_PTE_YOUNG)
++#define pte_exec(pte) (!(pte_val(pte) & L_PTE_XN))
++#define pte_special(pte) (0)
++
++#define pte_present_user(pte) \
++ ((pte_val(pte) & (L_PTE_PRESENT | L_PTE_USER)) == \
++ (L_PTE_PRESENT | L_PTE_USER))
++
+ #if __LINUX_ARM_ARCH__ < 6
+ static inline void __sync_icache_dcache(pte_t pteval)
+ {
+@@ -371,25 +383,15 @@ extern void __sync_icache_dcache(pte_t p
+ static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
+ pte_t *ptep, pte_t pteval)
+ {
+- if (addr >= TASK_SIZE)
+- set_pte_ext(ptep, pteval, 0);
+- else {
++ unsigned long ext = 0;
++
++ if (addr < TASK_SIZE && pte_present_user(pteval)) {
+ __sync_icache_dcache(pteval);
+- set_pte_ext(ptep, pteval, PTE_EXT_NG);
++ ext |= PTE_EXT_NG;
+ }
+-}
+
+-#define pte_none(pte) (!pte_val(pte))
+-#define pte_present(pte) (pte_val(pte) & L_PTE_PRESENT)
+-#define pte_write(pte) (!(pte_val(pte) & L_PTE_RDONLY))
+-#define pte_dirty(pte) (pte_val(pte) & L_PTE_DIRTY)
+-#define pte_young(pte) (pte_val(pte) & L_PTE_YOUNG)
+-#define pte_exec(pte) (!(pte_val(pte) & L_PTE_XN))
+-#define pte_special(pte) (0)
+-
+-#define pte_present_user(pte) \
+- ((pte_val(pte) & (L_PTE_PRESENT | L_PTE_USER)) == \
+- (L_PTE_PRESENT | L_PTE_USER))
++ set_pte_ext(ptep, pteval, ext);
++}
+
+ #define PTE_BIT_FUNC(fn,op) \
+ static inline pte_t pte_##fn(pte_t pte) { pte_val(pte) op; return pte; }
+--- a/arch/arm/mm/flush.c
++++ b/arch/arm/mm/flush.c
+@@ -236,8 +236,6 @@ void __sync_icache_dcache(pte_t pteval)
+ struct page *page;
+ struct address_space *mapping;
+
+- if (!pte_present_user(pteval))
+- return;
+ if (cache_is_vipt_nonaliasing() && !pte_exec(pteval))
+ /* only flush non-aliasing VIPT caches for exec mappings */
+ return;
--- /dev/null
+From f5f2025ef3e2cdb593707cbf87378761f17befbe Mon Sep 17 00:00:00 2001
+From: Will Deacon <will.deacon@arm.com>
+Date: Fri, 10 Aug 2012 17:51:19 +0100
+Subject: ARM: 7488/1: mm: use 5 bits for swapfile type encoding
+
+From: Will Deacon <will.deacon@arm.com>
+
+commit f5f2025ef3e2cdb593707cbf87378761f17befbe upstream.
+
+Page migration encodes the pfn in the offset field of a swp_entry_t.
+For LPAE, we support physical addresses of up to 36 bits (due to
+sparsemem limitations with the size of page flags), requiring 24 bits
+to represent a pfn. A further 3 bits are used to encode a swp_entry into
+a pte, leaving 5 bits for the type field. Furthermore, the core code
+defines MAX_SWAPFILES_SHIFT as 5, so the additional type bit does not
+get used.
+
+This patch reduces the width of the type field to 5 bits, allowing us
+to create up to 31 swapfiles of 64GB each.
+
+Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
+Signed-off-by: Will Deacon <will.deacon@arm.com>
+Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/include/asm/pgtable.h | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/arch/arm/include/asm/pgtable.h
++++ b/arch/arm/include/asm/pgtable.h
+@@ -418,13 +418,13 @@ static inline pte_t pte_modify(pte_t pte
+ *
+ * 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
+ * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+- * <--------------- offset --------------------> <- type --> 0 0 0
++ * <--------------- offset ----------------------> < type -> 0 0 0
+ *
+- * This gives us up to 63 swap files and 32GB per swap file. Note that
++ * This gives us up to 31 swap files and 64GB per swap file. Note that
+ * the offset field is always non-zero.
+ */
+ #define __SWP_TYPE_SHIFT 3
+-#define __SWP_TYPE_BITS 6
++#define __SWP_TYPE_BITS 5
+ #define __SWP_TYPE_MASK ((1 << __SWP_TYPE_BITS) - 1)
+ #define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
+
--- /dev/null
+From 730a8128cd8978467eb1cf546b11014acb57d433 Mon Sep 17 00:00:00 2001
+From: Will Deacon <will.deacon@arm.com>
+Date: Fri, 10 Aug 2012 19:13:36 +0100
+Subject: ARM: 7489/1: errata: fix workaround for erratum #720789 on UP systems
+
+From: Will Deacon <will.deacon@arm.com>
+
+commit 730a8128cd8978467eb1cf546b11014acb57d433 upstream.
+
+Commit 5a783cbc4836 ("ARM: 7478/1: errata: extend workaround for erratum
+ #720789") added workarounds for erratum #720789 to the range TLB
+invalidation functions with the observation that the erratum only
+affects SMP platforms. However, when running an SMP_ON_UP kernel on a
+uniprocessor platform we must take care to preserve the ASID as the
+workaround is not required.
+
+This patch ensures that we don't set the ASID to 0 when flushing the TLB
+on such a system, preserving the original behaviour with the workaround
+disabled.
+
+Signed-off-by: Will Deacon <will.deacon@arm.com>
+Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/mm/tlb-v7.S | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/arch/arm/mm/tlb-v7.S
++++ b/arch/arm/mm/tlb-v7.S
+@@ -38,10 +38,10 @@ ENTRY(v7wbi_flush_user_tlb_range)
+ dsb
+ mov r0, r0, lsr #PAGE_SHIFT @ align address
+ mov r1, r1, lsr #PAGE_SHIFT
+-#ifdef CONFIG_ARM_ERRATA_720789
+- mov r3, #0
+-#else
+ asid r3, r3 @ mask ASID
++#ifdef CONFIG_ARM_ERRATA_720789
++ ALT_SMP(W(mov) r3, #0 )
++ ALT_UP(W(nop) )
+ #endif
+ orr r0, r3, r0, lsl #PAGE_SHIFT @ Create initial MVA
+ mov r1, r1, lsl #PAGE_SHIFT
--- /dev/null
+From b01858c7806e7e6f6121da2e51c9222fc4d21dc6 Mon Sep 17 00:00:00 2001
+From: Heiko Stuebner <heiko@sntech.de>
+Date: Tue, 7 Aug 2012 19:12:05 +0900
+Subject: ARM: S3C24XX: Fix s3c2410_dma_enqueue parameters
+
+From: Heiko Stuebner <heiko@sntech.de>
+
+commit b01858c7806e7e6f6121da2e51c9222fc4d21dc6 upstream.
+
+Commit d670ac019f60 (ARM: SAMSUNG: DMA Cleanup as per sparse) changed the
+prototype of the s3c2410_dma_* functions to use the enum dma_ch instead
+of an generic unsigned int.
+
+In the s3c24xx dma.c s3c2410_dma_enqueue seems to have been forgotten,
+the other functions there were changed correctly.
+
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/arm/plat-s3c24xx/dma.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/plat-s3c24xx/dma.c
++++ b/arch/arm/plat-s3c24xx/dma.c
+@@ -431,7 +431,7 @@ s3c2410_dma_canload(struct s3c2410_dma_c
+ * when necessary.
+ */
+
+-int s3c2410_dma_enqueue(unsigned int channel, void *id,
++int s3c2410_dma_enqueue(enum dma_ch channel, void *id,
+ dma_addr_t data, int size)
+ {
+ struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel);
usb-vt6656-remove-__devinit-from-the-struct-usb_device_id-table.patch
usb-emi62-remove-__devinit-from-the-struct-usb_device_id-table.patch
alsa-hda-fix-copyright-debug-message.patch
+arm-7487-1-mm-avoid-setting-ng-bit-for-user-mappings-that-aren-t-present.patch
+arm-7488-1-mm-use-5-bits-for-swapfile-type-encoding.patch
+arm-7489-1-errata-fix-workaround-for-erratum-720789-on-up-systems.patch
+arm-s3c24xx-fix-s3c2410_dma_enqueue-parameters.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
