+2024-10-20 Jeff Law <jlaw@ventanamicro.com>
+
+ Revert:
+ 2024-10-19 Craig Blackmore <craig.blackmore@embecosm.com>
+
+ * config/riscv/riscv.cc (riscv_use_by_pieces_infrastructure_p):
+ New function.
+ (TARGET_USE_BY_PIECES_INFRASTRUCTURE_P): Define.
+
2024-10-19 Andrew Pinski <quic_apinski@quicinc.com>
PR tree-optimization/112418
+2024-10-20 Gaius Mulley <gaiusmod2@gmail.com>
+
+ * gm2-compiler/M2MetaError.mod (op): Corrected ordering.
+ * gm2-compiler/P2SymBuild.def: Remove comment.
+ * gm2-compiler/P2SymBuild.mod (GetComparison): Replace
+ the word less with fewer.
+
2024-10-19 Gaius Mulley <gaiusmod2@gmail.com>
* gm2-compiler/M2MetaError.mod (op): Alphabetically order
+2024-10-20 Jeff Law <jlaw@ventanamicro.com>
+
+ Revert:
+ 2024-10-20 Craig Blackmore <craig.blackmore@embecosm.com>
+
+ * gcc.target/riscv/rvv/autovec/pr113469.c: Expect mf2 setmem.
+ * gcc.target/riscv/rvv/base/setmem-2.c: Update f1 to expect
+ straight-line vector memset.
+ * gcc.target/riscv/rvv/base/setmem-3.c: Likewise.
+
2024-10-19 Lewis Hyatt <lhyatt@gmail.com>
PR preprocessor/114423