ARM: dts: renesas: r9a06g032-rzn1d400-eb: Describe 9-pin D-sub serial port

A simple CTS/RTS capable UART on a good old D-sub connector.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250424102805.22803-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts
index 7f721720f64737744e588c4a97dfc611ee2009f3..b3de325fb47fa3a5bdea2636f7e63c0332922931 100644 (file)
--- a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts
+++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts
@@ -147,6 +147,14 @@
                pinmux = <RZN1_PINMUX(96, RZN1_FUNC_SDIO)>;
                drive-strength = <12>;
        };
+
+       pins_uart2: pins-uart2 {
+               pinmux = <RZN1_PINMUX(105, RZN1_FUNC_UART2)>,
+                        <RZN1_PINMUX(106, RZN1_FUNC_UART2)>,
+                        <RZN1_PINMUX(107, RZN1_FUNC_UART2)>,
+                        <RZN1_PINMUX(108, RZN1_FUNC_UART2)>;
+               bias-disable;
+       };
 };
 
 &sdio1 {
@@ -223,3 +231,10 @@
        phy-handle = <&switch0phy1>;
        status = "okay";
 };
+
+&uart2 {
+       pinctrl-0 = <&pins_uart2>;
+       pinctrl-names = "default";
+       status = "okay";
+       uart-has-rtscts;
+};