drm/bridge: tc358767: Support write-only registers

Most registers are read-writable, but some are only RO or even WO.
regmap does not support using readable_reg and wr_table when outputting
in debugfs, so switch to writeable_reg.
First check for RO or WO registers and fallback tc_readable_reg() for the
leftover RW registers.

Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Robert Foss <rfoss@kernel.org>
Link: https://lore.kernel.org/r/20240904120546.1845856-4-alexander.stein@ew.tq-group.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20240904120546.1845856-4-alexander.stein@ew.tq-group.com

diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c
index 1c42c8c6e632e86b3b6c3ae147b866e5c80e0301..159c95b26d33c1ec3056958e28f92e429e8c0a29 100644 (file)
--- a/drivers/gpu/drm/bridge/tc358767.c
+++ b/drivers/gpu/drm/bridge/tc358767.c
@@ -2169,19 +2169,31 @@ static const struct regmap_access_table tc_precious_table = {
        .n_yes_ranges = ARRAY_SIZE(tc_precious_ranges),
 };
 
-static const struct regmap_range tc_non_writeable_ranges[] = {
-       regmap_reg_range(PPI_BUSYPPI, PPI_BUSYPPI),
-       regmap_reg_range(DSI_BUSYDSI, DSI_BUSYDSI),
-       regmap_reg_range(DSI_LANESTATUS0, DSI_INTSTATUS),
-       regmap_reg_range(TC_IDREG, SYSSTAT),
-       regmap_reg_range(GPIOI, GPIOI),
-       regmap_reg_range(DP0_LTSTAT, DP0_SNKLTCHGREQ),
-};
-
-static const struct regmap_access_table tc_writeable_table = {
-       .no_ranges = tc_non_writeable_ranges,
-       .n_no_ranges = ARRAY_SIZE(tc_non_writeable_ranges),
-};
+static bool tc_writeable_reg(struct device *dev, unsigned int reg)
+{
+       /* RO reg */
+       switch (reg) {
+       case PPI_BUSYPPI:
+       case DSI_BUSYDSI:
+       case DSI_LANESTATUS0:
+       case DSI_LANESTATUS1:
+       case DSI_INTSTATUS:
+       case TC_IDREG:
+       case SYSBOOT:
+       case SYSSTAT:
+       case GPIOI:
+       case DP0_LTSTAT:
+       case DP0_SNKLTCHGREQ:
+               return false;
+       }
+       /* WO reg */
+       switch (reg) {
+       case DSI_STARTDSI:
+       case DSI_INTCLR:
+               return true;
+       }
+       return tc_readable_reg(dev, reg);
+}
 
 static const struct regmap_config tc_regmap_config = {
        .name = "tc358767",
@@ -2191,9 +2203,9 @@ static const struct regmap_config tc_regmap_config = {
        .max_register = PLL_DBG,
        .cache_type = REGCACHE_MAPLE,
        .readable_reg = tc_readable_reg,
+       .writeable_reg = tc_writeable_reg,
        .volatile_table = &tc_volatile_table,
        .precious_table = &tc_precious_table,
-       .wr_table = &tc_writeable_table,
        .reg_format_endian = REGMAP_ENDIAN_BIG,
        .val_format_endian = REGMAP_ENDIAN_LITTLE,
 };