aarch64: Add support for chkfeat insn

This is a hint space instruction to check for enabled HW features and
update the x16 register accordingly.

Use unspec_volatile to prevent reordering it around calls since calls
can enable or disable HW features.

gcc/ChangeLog:

	* config/aarch64/aarch64.md (aarch64_chkfeat): New.

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 8d10197c9e8dd66b7a30a1034b629297b9992661..0c5694f3e5e18dd734c480286981f504bde14305 100644 (file)
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -381,6 +381,7 @@
     UNSPECV_BTI_C              ; Represent BTI c.
     UNSPECV_BTI_J              ; Represent BTI j.
     UNSPECV_BTI_JC             ; Represent BTI jc.
+    UNSPECV_CHKFEAT            ; Represent CHKFEAT X16.
     UNSPECV_TSTART             ; Represent transaction start.
     UNSPECV_TCOMMIT            ; Represent transaction commit.
     UNSPECV_TCANCEL            ; Represent transaction cancel.
@@ -8309,6 +8310,14 @@
   "msr\tnzcv, %0"
 )
 
+;; CHKFEAT instruction
+(define_insn "aarch64_chkfeat"
+  [(set (reg:DI R16_REGNUM)
+        (unspec_volatile:DI [(reg:DI R16_REGNUM)] UNSPECV_CHKFEAT))]
+  ""
+  "hint\\t40 // chkfeat x16"
+)
+
 ;; AdvSIMD Stuff
 (include "aarch64-simd.md")