fix up microcode text in other queues

diff --git a/queue-5.10/x86-microcode-check-cpu-capabilities-after-late-micr.patch b/queue-5.10/x86-microcode-check-cpu-capabilities-after-late-micr.patch
index ba867a1b07e73b8eefc4b81b3078b0415577a1de..b2d57b7bcf9693b3054f51c4d0b992a33811c381 100644 (file)
--- a/queue-5.10/x86-microcode-check-cpu-capabilities-after-late-micr.patch
+++ b/queue-5.10/x86-microcode-check-cpu-capabilities-after-late-micr.patch
@@ -17,14 +17,14 @@ comparing the values before and after the microcode update.
 Another example is X86_FEATURE_SRBDS_CTRL which gets added only after
 microcode update:
 
-  --- cpuid.before     2023-01-21 14:54:15.652000747 +0100
-  +++ cpuid.after      2023-01-21 14:54:26.632001024 +0100
-  @@ -10,7 +10,7 @@ CPU:
-      0x00000004 0x04: eax=0x00000000 ebx=0x00000000 ecx=0x00000000 edx=0x00000000
-      0x00000005 0x00: eax=0x00000040 ebx=0x00000040 ecx=0x00000003 edx=0x11142120
-      0x00000006 0x00: eax=0x000027f7 ebx=0x00000002 ecx=0x00000001 edx=0x00000000
-  -   0x00000007 0x00: eax=0x00000000 ebx=0x029c6fbf ecx=0x40000000 edx=0xbc002400
-  +   0x00000007 0x00: eax=0x00000000 ebx=0x029c6fbf ecx=0x40000000 edx=0xbc002e00
+#  --- cpuid.before    2023-01-21 14:54:15.652000747 +0100
+#  +++ cpuid.after     2023-01-21 14:54:26.632001024 +0100
+#  @@ -10,7 +10,7 @@ CPU:
+#      0x00000004 0x04: eax=0x00000000 ebx=0x00000000 ecx=0x00000000 edx=0x00000000
+#      0x00000005 0x00: eax=0x00000040 ebx=0x00000040 ecx=0x00000003 edx=0x11142120
+#      0x00000006 0x00: eax=0x000027f7 ebx=0x00000002 ecx=0x00000001 edx=0x00000000
+#  -   0x00000007 0x00: eax=0x00000000 ebx=0x029c6fbf ecx=0x40000000 edx=0xbc002400
+#  +   0x00000007 0x00: eax=0x00000000 ebx=0x029c6fbf ecx=0x40000000 edx=0xbc002e00
                                                                             ^^^
 
 and which proves for a gazillionth time that late loading is a bad bad

diff --git a/queue-5.15/x86-microcode-check-cpu-capabilities-after-late-micr.patch b/queue-5.15/x86-microcode-check-cpu-capabilities-after-late-micr.patch
index 8bc70e732abb0c458f6f2cbb59e45f157f03d60e..2ff411b51319d594a618c879fd2078370c0a3aff 100644 (file)
--- a/queue-5.15/x86-microcode-check-cpu-capabilities-after-late-micr.patch
+++ b/queue-5.15/x86-microcode-check-cpu-capabilities-after-late-micr.patch
@@ -17,14 +17,14 @@ comparing the values before and after the microcode update.
 Another example is X86_FEATURE_SRBDS_CTRL which gets added only after
 microcode update:
 
-  --- cpuid.before     2023-01-21 14:54:15.652000747 +0100
-  +++ cpuid.after      2023-01-21 14:54:26.632001024 +0100
-  @@ -10,7 +10,7 @@ CPU:
-      0x00000004 0x04: eax=0x00000000 ebx=0x00000000 ecx=0x00000000 edx=0x00000000
-      0x00000005 0x00: eax=0x00000040 ebx=0x00000040 ecx=0x00000003 edx=0x11142120
-      0x00000006 0x00: eax=0x000027f7 ebx=0x00000002 ecx=0x00000001 edx=0x00000000
-  -   0x00000007 0x00: eax=0x00000000 ebx=0x029c6fbf ecx=0x40000000 edx=0xbc002400
-  +   0x00000007 0x00: eax=0x00000000 ebx=0x029c6fbf ecx=0x40000000 edx=0xbc002e00
+#  --- cpuid.before    2023-01-21 14:54:15.652000747 +0100
+#  +++ cpuid.after     2023-01-21 14:54:26.632001024 +0100
+#  @@ -10,7 +10,7 @@ CPU:
+#      0x00000004 0x04: eax=0x00000000 ebx=0x00000000 ecx=0x00000000 edx=0x00000000
+#      0x00000005 0x00: eax=0x00000040 ebx=0x00000040 ecx=0x00000003 edx=0x11142120
+#      0x00000006 0x00: eax=0x000027f7 ebx=0x00000002 ecx=0x00000001 edx=0x00000000
+#  -   0x00000007 0x00: eax=0x00000000 ebx=0x029c6fbf ecx=0x40000000 edx=0xbc002400
+#  +   0x00000007 0x00: eax=0x00000000 ebx=0x029c6fbf ecx=0x40000000 edx=0xbc002e00
                                                                             ^^^
 
 and which proves for a gazillionth time that late loading is a bad bad

diff --git a/queue-6.1/x86-microcode-check-cpu-capabilities-after-late-micr.patch b/queue-6.1/x86-microcode-check-cpu-capabilities-after-late-micr.patch
index c49f4fecaa80c8aff62cb20f728da1ad6a99604b..5b81a27262d212689812538ddbb8b11fe5dc8ff2 100644 (file)
--- a/queue-6.1/x86-microcode-check-cpu-capabilities-after-late-micr.patch
+++ b/queue-6.1/x86-microcode-check-cpu-capabilities-after-late-micr.patch
@@ -17,14 +17,14 @@ comparing the values before and after the microcode update.
 Another example is X86_FEATURE_SRBDS_CTRL which gets added only after
 microcode update:
 
-  --- cpuid.before     2023-01-21 14:54:15.652000747 +0100
-  +++ cpuid.after      2023-01-21 14:54:26.632001024 +0100
-  @@ -10,7 +10,7 @@ CPU:
-      0x00000004 0x04: eax=0x00000000 ebx=0x00000000 ecx=0x00000000 edx=0x00000000
-      0x00000005 0x00: eax=0x00000040 ebx=0x00000040 ecx=0x00000003 edx=0x11142120
-      0x00000006 0x00: eax=0x000027f7 ebx=0x00000002 ecx=0x00000001 edx=0x00000000
-  -   0x00000007 0x00: eax=0x00000000 ebx=0x029c6fbf ecx=0x40000000 edx=0xbc002400
-  +   0x00000007 0x00: eax=0x00000000 ebx=0x029c6fbf ecx=0x40000000 edx=0xbc002e00
+#  --- cpuid.before    2023-01-21 14:54:15.652000747 +0100
+#  +++ cpuid.after     2023-01-21 14:54:26.632001024 +0100
+#  @@ -10,7 +10,7 @@ CPU:
+#      0x00000004 0x04: eax=0x00000000 ebx=0x00000000 ecx=0x00000000 edx=0x00000000
+#      0x00000005 0x00: eax=0x00000040 ebx=0x00000040 ecx=0x00000003 edx=0x11142120
+#      0x00000006 0x00: eax=0x000027f7 ebx=0x00000002 ecx=0x00000001 edx=0x00000000
+#  -   0x00000007 0x00: eax=0x00000000 ebx=0x029c6fbf ecx=0x40000000 edx=0xbc002400
+#  +   0x00000007 0x00: eax=0x00000000 ebx=0x029c6fbf ecx=0x40000000 edx=0xbc002e00
                                                                             ^^^
 
 and which proves for a gazillionth time that late loading is a bad bad