exec/cpu-all: remove this header

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250325045915.994760-16-pierrick.bouvier@linaro.org>

diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index 8d2b957a3b54e6aaba254f59dabe12b1abd7b262..5ced3879ac4e1a1d2ba11909f1924acdc807c42a 100644 (file)
--- a/accel/tcg/cpu-exec.c
+++ b/accel/tcg/cpu-exec.c
@@ -35,7 +35,6 @@
 #include "qemu/rcu.h"
 #include "exec/log.h"
 #include "qemu/main-loop.h"
-#include "exec/cpu-all.h"
 #include "cpu.h"
 #include "exec/icount.h"
 #include "exec/replay-core.h"

diff --git a/hw/hyperv/hyperv.c b/hw/hyperv/hyperv.c
index c487f13e2f969d03a8ee6b18b1e8e3b0d337fa15..8f193fd0bdffca35576eaa6c85c1b5be8bbfa765 100644 (file)
--- a/hw/hyperv/hyperv.c
+++ b/hw/hyperv/hyperv.c
@@ -24,7 +24,6 @@
 #include "qom/object.h"
 #include "target/i386/kvm/hyperv-proto.h"
 #include "target/i386/cpu.h"
-#include "exec/cpu-all.h"
 #include "exec/target_page.h"
 
 struct SynICState {

diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
deleted file mode 100644 (file)
index 5122fdb..0000000
--- a/include/exec/cpu-all.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * defines common to all virtual CPUs
- *
- *  Copyright (c) 2003 Fabrice Bellard
- *
- * This library is free software; you can redistribute it and/or
- * modify it under the terms of the GNU Lesser General Public
- * License as published by the Free Software Foundation; either
- * version 2.1 of the License, or (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public
- * License along with this library; if not, see <http://www.gnu.org/licenses/>.
- */
-#ifndef CPU_ALL_H
-#define CPU_ALL_H
-
-#include "hw/core/cpu.h"
-#include "exec/cpu-defs.h"
-
-#endif /* CPU_ALL_H */

diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index 28bd27b8ed8b46bc0f6df94627a9e0f4b780b92f..10b6b25b344a604a316bb439c5ed4eccfdd3c123 100644 (file)
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -579,7 +579,7 @@ QEMU_BUILD_BUG_ON(offsetof(CPUState, neg) !=
 
 static inline CPUArchState *cpu_env(CPUState *cpu)
 {
-    /* We validate that CPUArchState follows CPUState in cpu-all.h. */
+    /* We validate that CPUArchState follows CPUState in cpu-target.c */
     return (CPUArchState *)(cpu + 1);
 }
 

diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h
index b915835bead0190a7a5fb642c37e6484e450545d..9a117645360650ea84fa70e6483374c563135b65 100644 (file)
--- a/include/qemu/bswap.h
+++ b/include/qemu/bswap.h
@@ -205,9 +205,6 @@ CPU_CONVERT(le, 64, uint64_t)
  *   te   : target endian
  * (except for byte accesses, which have no endian infix).
  *
- * The target endian accessors are obviously only available to source
- * files which are built per-target; they are defined in cpu-all.h.
- *
  * In all cases these functions take a host pointer.
  * For accessors that take a guest address rather than a
  * host address, see the cpu_{ld,st}_* accessors defined in

diff --git a/semihosting/uaccess.c b/semihosting/uaccess.c
index f51a2536266f25bf959d716f9bf265c05565ce01..81ffecaaba4848817c336cc655777c857261e76c 100644 (file)
--- a/semihosting/uaccess.c
+++ b/semihosting/uaccess.c
@@ -8,7 +8,6 @@
  */
 
 #include "qemu/osdep.h"
-#include "exec/cpu-all.h"
 #include "accel/tcg/cpu-mmu-index.h"
 #include "exec/exec-all.h"
 #include "exec/target_page.h"

diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
index fb1d63527ef831878a00b9bcb7e7550902230504..849f67348946cf996114d833113bdde45478585f 100644 (file)
--- a/target/alpha/cpu.h
+++ b/target/alpha/cpu.h
@@ -289,8 +289,6 @@ void alpha_cpu_dump_state(CPUState *cs, FILE *f, int flags);
 int alpha_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
 int alpha_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
 
-#include "exec/cpu-all.h"
-
 enum {
     FEATURE_ASN    = 0x00000001,
     FEATURE_SPS    = 0x00000002,

diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index ee92476814ccca42c3f153ee05fbd2a14e85e609..ea9956395ca803bd0ac465b64b898aa94e0f0f84 100644 (file)
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -2968,8 +2968,6 @@ static inline bool arm_sctlr_b(CPUARMState *env)
 
 uint64_t arm_sctlr(CPUARMState *env, int el);
 
-#include "exec/cpu-all.h"
-
 /*
  * We have more than 32-bits worth of state per TB, so we split the data
  * between tb->flags and tb->cs_base, which is otherwise unused for ARM.

diff --git a/target/avr/cpu.h b/target/avr/cpu.h
index a0fb40141a45f9909e29ff3eb9889d5565b6ad74..d6666175a98ba52dd693bab689577a90595423a6 100644 (file)
--- a/target/avr/cpu.h
+++ b/target/avr/cpu.h
@@ -259,6 +259,4 @@ bool avr_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
 extern const MemoryRegionOps avr_cpu_reg1;
 extern const MemoryRegionOps avr_cpu_reg2;
 
-#include "exec/cpu-all.h"
-
 #endif /* QEMU_AVR_CPU_H */

diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h
index e4fc35b112d1f8d29e33aee4673deb62ce0e0cdf..c065fa8ddcfd3e03c23bd4587955ad42e8bf11d2 100644 (file)
--- a/target/hexagon/cpu.h
+++ b/target/hexagon/cpu.h
@@ -158,6 +158,4 @@ void hexagon_translate_init(void);
 void hexagon_translate_code(CPUState *cs, TranslationBlock *tb,
                             int *max_insns, vaddr pc, void *host_pc);
 
-#include "exec/cpu-all.h"
-
 #endif /* HEXAGON_CPU_H */

diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index 4e72ab025b1101d6d3f8b1c67a7758a74fd7f6fa..da5f8adcd5890c55bdb21ccdf82696922ceee3c3 100644 (file)
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -306,8 +306,6 @@ struct HPPACPUClass {
     ResettablePhases parent_phases;
 };
 
-#include "exec/cpu-all.h"
-
 static inline bool hppa_is_pa20(const CPUHPPAState *env)
 {
     return env->is_pa20;

diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 02ea87347a5b7ba9138ad7fd532d294de532d5ca..bd63036334566975c666c6a8f3f34ce8ed87934d 100644 (file)
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -2604,7 +2604,6 @@ static inline bool is_mmu_index_32(int mmu_index)
 #define CC_SRC2 (env->cc_src2)
 #define CC_OP   (env->cc_op)
 
-#include "exec/cpu-all.h"
 #include "svm.h"
 
 #if !defined(CONFIG_USER_ONLY)

diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index 69117c602afd790e96141a9273cafb9be0f85a3f..ad8b0ed2354efec0b926e7973db77c36f0ef17ab 100644 (file)
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -504,8 +504,6 @@ static inline void cpu_get_tb_cpu_state(CPULoongArchState *env, vaddr *pc,
     *flags |= is_va32(env) * HW_FLAGS_VA32;
 }
 
-#include "exec/cpu-all.h"
-
 #define CPU_RESOLVING_TYPE TYPE_LOONGARCH_CPU
 
 void loongarch_cpu_post_init(Object *obj);

diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index 5347fbe3975fc21002a0f3cc08e4c0ac2239a9bb..0b70e8c6ab644cc76ac746feaf74831e114ad2f9 100644 (file)
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -596,8 +596,6 @@ void m68k_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
                                  MemTxResult response, uintptr_t retaddr);
 #endif
 
-#include "exec/cpu-all.h"
-
 /* TB flags */
 #define TB_FLAGS_MACSR          0x0f
 #define TB_FLAGS_MSR_S_BIT      13

diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index 90d820b90c736021c6496b651cb7452e1d29c59c..2bfa396c96d765c99b23366f95cfcf2fcead16c2 100644 (file)
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -411,8 +411,6 @@ void mb_translate_code(CPUState *cs, TranslationBlock *tb,
 #define MMU_USER_IDX    2
 /* See NB_MMU_MODES in cpu-defs.h. */
 
-#include "exec/cpu-all.h"
-
 /* Ensure there is no overlap between the two masks. */
 QEMU_BUILD_BUG_ON(MSR_TB_MASK & IFLAGS_TB_MASK);
 

diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 79f8041ced4987654ce4274fa86e4105d91e5fb3..20f31370bcbfaafc2931744ef1456c1a19095550 100644 (file)
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -1258,8 +1258,6 @@ static inline int mips_env_mmu_index(CPUMIPSState *env)
     return hflags_mmu_index(env->hflags);
 }
 
-#include "exec/cpu-all.h"
-
 /* Exceptions */
 enum {
     EXCP_NONE          = -1,

diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h
index f16a070ef6c3145e84deb82d3cec5254eb23a237..19ee85ff5a07bf5a38ee40a1917543b925abe22b 100644 (file)
--- a/target/openrisc/cpu.h
+++ b/target/openrisc/cpu.h
@@ -334,8 +334,6 @@ void cpu_openrisc_count_stop(OpenRISCCPU *cpu);
 
 #define CPU_RESOLVING_TYPE TYPE_OPENRISC_CPU
 
-#include "exec/cpu-all.h"
-
 #define TB_FLAGS_SM    SR_SM
 #define TB_FLAGS_DME   SR_DME
 #define TB_FLAGS_IME   SR_IME

diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index aa5df47bdafef3bb76270fcab87224b5b8597dea..3c02f7f7d4581c6f9f4fadb3567023fc6ca1436e 100644 (file)
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -1704,8 +1704,6 @@ void ppc_compat_add_property(Object *obj, const char *name,
                              uint32_t *compat_pvr, const char *basedesc);
 #endif /* defined(TARGET_PPC64) */
 
-#include "exec/cpu-all.h"
-
 /*****************************************************************************/
 /* CRF definitions */
 #define CRF_LT_BIT    3

diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 14a6779b4c17640af8aa5185903813ddddb05e53..867e539b53a75b1d43dd35d18e7f209ba4f8fa4a 100644 (file)
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -634,8 +634,6 @@ G_NORETURN void riscv_raise_exception(CPURISCVState *env,
 target_ulong riscv_cpu_get_fflags(CPURISCVState *env);
 void riscv_cpu_set_fflags(CPURISCVState *env, target_ulong);
 
-#include "exec/cpu-all.h"
-
 FIELD(TB_FLAGS, MEM_IDX, 0, 3)
 FIELD(TB_FLAGS, FS, 3, 2)
 /* Vector flags */

diff --git a/target/rx/cpu.h b/target/rx/cpu.h
index e2ec78835e4cb19cb41c3a57f4b77d1b265d041f..5c19c832194e5b175eb281a80cef203e3109ac63 100644 (file)
--- a/target/rx/cpu.h
+++ b/target/rx/cpu.h
@@ -147,8 +147,6 @@ void rx_translate_code(CPUState *cs, TranslationBlock *tb,
                        int *max_insns, vaddr pc, void *host_pc);
 void rx_cpu_unpack_psw(CPURXState *env, uint32_t psw, int rte);
 
-#include "exec/cpu-all.h"
-
 #define CPU_INTERRUPT_SOFT CPU_INTERRUPT_TGT_INT_0
 #define CPU_INTERRUPT_FIR  CPU_INTERRUPT_TGT_INT_1
 

diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h
index 83d01d5c4e1bb3f520a2a0ce8c27c33bc01b4f1f..940eda8dd12374b0c08c37fce72ef60583e2073b 100644 (file)
--- a/target/s390x/cpu.h
+++ b/target/s390x/cpu.h
@@ -948,6 +948,4 @@ uint64_t s390_cpu_get_psw_mask(CPUS390XState *env);
 /* outside of target/s390x/ */
 S390CPU *s390_cpu_addr2state(uint16_t cpu_addr);
 
-#include "exec/cpu-all.h"
-
 #endif

diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
index 7581f5eecb7edf614619548841b8f4fa47dcbbff..7752a0c2e1a509ee04c47a4e7ad93f9eb1f2d248 100644 (file)
--- a/target/sh4/cpu.h
+++ b/target/sh4/cpu.h
@@ -288,8 +288,6 @@ void cpu_load_tlb(CPUSH4State * env);
 /* MMU modes definitions */
 #define MMU_USER_IDX 1
 
-#include "exec/cpu-all.h"
-
 /* MMU control register */
 #define MMUCR    0x1F000010
 #define MMUCR_AT (1<<0)

diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index b87351a6660170d5068575c27a3699ce15d81675..734dfdb1d3d3aa8537ce3194befb3dd4bf678120 100644 (file)
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -729,8 +729,6 @@ static inline int cpu_pil_allowed(CPUSPARCState *env1, int pil)
 #endif
 }
 
-#include "exec/cpu-all.h"
-
 #ifdef TARGET_SPARC64
 /* sun4u.c */
 void cpu_tick_set_count(CPUTimer *timer, uint64_t count);

diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h
index abb9cba136dff2224ed4a49aa1fceb9b0c02ab45..c76e65f8185abe0d5cf5442385025d5fb3c760b4 100644 (file)
--- a/target/tricore/cpu.h
+++ b/target/tricore/cpu.h
@@ -251,8 +251,6 @@ void fpu_set_state(CPUTriCoreState *env);
 
 #define MMU_USER_IDX 2
 
-#include "exec/cpu-all.h"
-
 FIELD(TB_FLAGS, PRIV, 0, 2)
 
 void cpu_state_reset(CPUTriCoreState *s);

diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
index c5d2042de14523e8acef5290290c0f24c935619c..c03ed71c94548967fce1f9459dc5db7ea6617b32 100644 (file)
--- a/target/xtensa/cpu.h
+++ b/target/xtensa/cpu.h
@@ -733,8 +733,6 @@ static inline uint32_t xtensa_replicate_windowstart(CPUXtensaState *env)
 #define XTENSA_CSBASE_LBEG_OFF_MASK 0x00ff0000
 #define XTENSA_CSBASE_LBEG_OFF_SHIFT 16
 
-#include "exec/cpu-all.h"
-
 static inline void cpu_get_tb_cpu_state(CPUXtensaState *env, vaddr *pc,
                                         uint64_t *cs_base, uint32_t *flags)
 {

diff --git a/tcg/tcg-op-ldst.c b/tcg/tcg-op-ldst.c
index 73838e27015a97b960edbf0986680ecf5fc2f879..3b073b4ce0c9908bc2e119b2914ecc282f66f580 100644 (file)
--- a/tcg/tcg-op-ldst.c
+++ b/tcg/tcg-op-ldst.c
@@ -37,7 +37,7 @@ static void check_max_alignment(unsigned a_bits)
 {
     /*
      * The requested alignment cannot overlap the TLB flags.
-     * FIXME: Must keep the count up-to-date with "exec/cpu-all.h".
+     * FIXME: Must keep the count up-to-date with "exec/tlb-flags.h".
      */
     if (tcg_use_softmmu) {
         tcg_debug_assert(a_bits + 5 <= tcg_ctx->page_bits);