]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
wifi: rtw89: wow: update WoWLAN reason register for different FW
authorChih-Kang Chang <gary.chang@realtek.com>
Thu, 20 Jun 2024 05:58:20 +0000 (13:58 +0800)
committerPing-Ke Shih <pkshih@realtek.com>
Thu, 27 Jun 2024 01:21:56 +0000 (09:21 +0800)
Need to update WoWLAN wakeup reason register after firmware version
0.35.22.0 for RTL8922A, and 0.27.80.0 for RTL8852CE.

Signed-off-by: Chih-Kang Chang <gary.chang@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20240620055825.17592-3-pkshih@realtek.com
drivers/net/wireless/realtek/rtw89/core.h
drivers/net/wireless/realtek/rtw89/fw.c
drivers/net/wireless/realtek/rtw89/fw.h
drivers/net/wireless/realtek/rtw89/reg.h
drivers/net/wireless/realtek/rtw89/rtw8851b.c
drivers/net/wireless/realtek/rtw89/rtw8852a.c
drivers/net/wireless/realtek/rtw89/rtw8852b.c
drivers/net/wireless/realtek/rtw89/rtw8852c.c
drivers/net/wireless/realtek/rtw89/rtw8922a.c
drivers/net/wireless/realtek/rtw89/wow.c

index e8ec0246bccd211fe02fd0a7335d6d6205619503..f1de975c53561c5cd17ad2d25f11d8bc93004546 100644 (file)
@@ -4236,7 +4236,7 @@ struct rtw89_chip_info {
        const u32 *c2h_regs;
        struct rtw89_reg_def c2h_counter_reg;
        const struct rtw89_page_regs *page_regs;
-       u32 wow_reason_reg;
+       const u32 *wow_reason_reg;
        bool cfo_src_fd;
        bool cfo_hw_comp;
        const struct rtw89_reg_def *dcfo_comp;
@@ -4346,6 +4346,7 @@ enum rtw89_fw_feature {
        RTW89_FW_FEATURE_NO_LPS_PG,
        RTW89_FW_FEATURE_BEACON_FILTER,
        RTW89_FW_FEATURE_MACID_PAUSE_SLEEP,
+       RTW89_FW_FEATURE_WOW_REASON_V1,
 };
 
 struct rtw89_fw_suit {
index 3c666fd0f8eda16000f999b41ab3325325aaa034..a907d381ac77b3859c21c4eff2fce4d203713127 100644 (file)
@@ -675,10 +675,12 @@ static const struct __fw_feat_cfg fw_feat_tbl[] = {
        __CFG_FW_FEAT(RTL8852C, ge, 0, 27, 36, 0, SCAN_OFFLOAD),
        __CFG_FW_FEAT(RTL8852C, ge, 0, 27, 40, 0, CRASH_TRIGGER),
        __CFG_FW_FEAT(RTL8852C, ge, 0, 27, 56, 10, BEACON_FILTER),
+       __CFG_FW_FEAT(RTL8852C, ge, 0, 27, 80, 0, WOW_REASON_V1),
        __CFG_FW_FEAT(RTL8922A, ge, 0, 34, 30, 0, CRASH_TRIGGER),
        __CFG_FW_FEAT(RTL8922A, ge, 0, 34, 11, 0, MACID_PAUSE_SLEEP),
        __CFG_FW_FEAT(RTL8922A, ge, 0, 34, 35, 0, SCAN_OFFLOAD),
        __CFG_FW_FEAT(RTL8922A, ge, 0, 35, 12, 0, BEACON_FILTER),
+       __CFG_FW_FEAT(RTL8922A, ge, 0, 35, 22, 0, WOW_REASON_V1),
 };
 
 static void rtw89_fw_iterate_feature_cfg(struct rtw89_fw_info *fw,
index 01fea0b004d3598ea9a6b10446fff6deb5fe6e93..c3b4324c621c16a83c07d15338edc3a8cec344ea 100644 (file)
@@ -4659,4 +4659,10 @@ const struct rtw89_rfe_parms *
 rtw89_load_rfe_data_from_fw(struct rtw89_dev *rtwdev,
                            const struct rtw89_rfe_parms *init);
 
+enum rtw89_wow_wakeup_ver {
+       RTW89_WOW_REASON_V0,
+       RTW89_WOW_REASON_V1,
+       RTW89_WOW_REASON_NUM,
+};
+
 #endif
index 5a59234301ca20df7a1d470ae5b18f8ad07b12da..fd81cf863beae35cd62981e81727ce0c5b540851 100644 (file)
 #define B_AX_S1_LDO2PWRCUT_F BIT(23)
 #define B_AX_S0_LDO_VSEL_F_MASK GENMASK(22, 21)
 
+#define R_AX_DBG_WOW 0x0504
+
 #define R_AX_SEC_CTRL 0x0C00
 #define B_AX_SEC_IDMEM_SIZE_CONFIG_MASK GENMASK(17, 16)
 
 
 #define R_BE_WLCPU_PORT_PC 0x03FC
 
+#define R_BE_DBG_WOW 0x0504
+
 #define R_BE_DCPU_PLATFORM_ENABLE 0x0888
 #define B_BE_DCPU_SYM_DPLT_MEM_MUX_EN BIT(10)
 #define B_BE_DCPU_WARM_EN BIT(9)
index 78e276f321c205da6fbfc5b1c32d47d105eb65d6..40cf84a79c464c34b0e185a01adb28420ae30849 100644 (file)
@@ -105,6 +105,10 @@ static const u32 rtw8851b_c2h_regs[RTW89_C2HREG_MAX] = {
        R_AX_C2HREG_DATA3
 };
 
+static const u32 rtw8851b_wow_wakeup_regs[RTW89_WOW_REASON_NUM] = {
+       R_AX_C2HREG_DATA3 + 3, R_AX_C2HREG_DATA3 + 3,
+};
+
 static const struct rtw89_page_regs rtw8851b_page_regs = {
        .hci_fc_ctrl    = R_AX_HCI_FC_CTRL,
        .ch_page_ctrl   = R_AX_CH_PAGE_CTRL,
@@ -2509,7 +2513,7 @@ const struct rtw89_chip_info rtw8851b_chip_info = {
        .c2h_counter_reg        = {R_AX_UDM1 + 1, B_AX_UDM1_HALMAC_C2H_ENQ_CNT_MASK >> 8},
        .c2h_regs               = rtw8851b_c2h_regs,
        .page_regs              = &rtw8851b_page_regs,
-       .wow_reason_reg         = R_AX_C2HREG_DATA3 + 3,
+       .wow_reason_reg         = rtw8851b_wow_wakeup_regs,
        .cfo_src_fd             = true,
        .cfo_hw_comp            = true,
        .dcfo_comp              = &rtw8851b_dcfo_comp,
index aebbceea93f84516964c69da043cb6d2c3580081..08e148328c6227db09a37c8bf9ee9d5136807b2d 100644 (file)
@@ -398,6 +398,10 @@ static const u32 rtw8852a_c2h_regs[RTW89_C2HREG_MAX] = {
        R_AX_C2HREG_DATA3
 };
 
+static const u32 rtw8852a_wow_wakeup_regs[RTW89_WOW_REASON_NUM] = {
+       R_AX_C2HREG_DATA3 + 3, R_AX_C2HREG_DATA3 + 3,
+};
+
 static const struct rtw89_page_regs rtw8852a_page_regs = {
        .hci_fc_ctrl    = R_AX_HCI_FC_CTRL,
        .ch_page_ctrl   = R_AX_CH_PAGE_CTRL,
@@ -2225,7 +2229,7 @@ const struct rtw89_chip_info rtw8852a_chip_info = {
        .c2h_regs               = rtw8852a_c2h_regs,
        .c2h_counter_reg        = {R_AX_UDM1 + 1, B_AX_UDM1_HALMAC_C2H_ENQ_CNT_MASK >> 8},
        .page_regs              = &rtw8852a_page_regs,
-       .wow_reason_reg         = R_AX_C2HREG_DATA3 + 3,
+       .wow_reason_reg         = rtw8852a_wow_wakeup_regs,
        .cfo_src_fd             = false,
        .cfo_hw_comp            = false,
        .dcfo_comp              = &rtw8852a_dcfo_comp,
index 381c881fee6913e90b8411ddc3f5c2817a9e2995..24f9fd444ca048851515ca12ec369979fdc2b0eb 100644 (file)
@@ -76,6 +76,10 @@ static const u32 rtw8852b_c2h_regs[RTW89_C2HREG_MAX] = {
        R_AX_C2HREG_DATA3
 };
 
+static const u32 rtw8852b_wow_wakeup_regs[RTW89_WOW_REASON_NUM] = {
+       R_AX_C2HREG_DATA3 + 3, R_AX_C2HREG_DATA3 + 3,
+};
+
 static const struct rtw89_page_regs rtw8852b_page_regs = {
        .hci_fc_ctrl    = R_AX_HCI_FC_CTRL,
        .ch_page_ctrl   = R_AX_CH_PAGE_CTRL,
@@ -1026,7 +1030,7 @@ const struct rtw89_chip_info rtw8852b_chip_info = {
        .c2h_counter_reg        = {R_AX_UDM1 + 1, B_AX_UDM1_HALMAC_C2H_ENQ_CNT_MASK >> 8},
        .c2h_regs               = rtw8852b_c2h_regs,
        .page_regs              = &rtw8852b_page_regs,
-       .wow_reason_reg         = R_AX_C2HREG_DATA3 + 3,
+       .wow_reason_reg         = rtw8852b_wow_wakeup_regs,
        .cfo_src_fd             = true,
        .cfo_hw_comp            = true,
        .dcfo_comp              = &rtw8852b_dcfo_comp,
index 544ea1d3b577fbb9238dc6166fd08314bb702ae3..193168dc7b6c35e5423a171b73c956240b49baf7 100644 (file)
@@ -73,6 +73,10 @@ static const u32 rtw8852c_c2h_regs[RTW89_H2CREG_MAX] = {
        R_AX_C2HREG_DATA3_V1
 };
 
+static const u32 rtw8852c_wow_wakeup_regs[RTW89_WOW_REASON_NUM] = {
+       R_AX_C2HREG_DATA3_V1 + 3, R_AX_DBG_WOW,
+};
+
 static const struct rtw89_page_regs rtw8852c_page_regs = {
        .hci_fc_ctrl    = R_AX_HCI_FC_CTRL_V1,
        .ch_page_ctrl   = R_AX_CH_PAGE_CTRL_V1,
@@ -3007,7 +3011,7 @@ const struct rtw89_chip_info rtw8852c_chip_info = {
        .c2h_counter_reg        = {R_AX_UDM1 + 1, B_AX_UDM1_HALMAC_C2H_ENQ_CNT_MASK >> 8},
        .c2h_regs               = rtw8852c_c2h_regs,
        .page_regs              = &rtw8852c_page_regs,
-       .wow_reason_reg         = R_AX_C2HREG_DATA3_V1 + 3,
+       .wow_reason_reg         = rtw8852c_wow_wakeup_regs,
        .cfo_src_fd             = false,
        .cfo_hw_comp            = false,
        .dcfo_comp              = &rtw8852c_dcfo_comp,
index cc4f251caadd6648a22900d0c9067d7996b5afcd..2af568a3264d3553a10cd45c7b1ef96f3dce7e1e 100644 (file)
@@ -85,6 +85,10 @@ static const u32 rtw8922a_c2h_regs[RTW89_H2CREG_MAX] = {
        R_BE_C2HREG_DATA3
 };
 
+static const u32 rtw8922a_wow_wakeup_regs[RTW89_WOW_REASON_NUM] = {
+       R_AX_C2HREG_DATA3_V1 + 3, R_BE_DBG_WOW,
+};
+
 static const struct rtw89_page_regs rtw8922a_page_regs = {
        .hci_fc_ctrl    = R_BE_HCI_FC_CTRL,
        .ch_page_ctrl   = R_BE_CH_PAGE_CTRL,
@@ -2609,7 +2613,7 @@ const struct rtw89_chip_info rtw8922a_chip_info = {
        .c2h_counter_reg        = {R_BE_UDM1 + 1, B_BE_UDM1_HALMAC_C2H_ENQ_CNT_MASK >> 8},
        .c2h_regs               = rtw8922a_c2h_regs,
        .page_regs              = &rtw8922a_page_regs,
-       .wow_reason_reg         = R_AX_C2HREG_DATA3_V1 + 3,
+       .wow_reason_reg         = rtw8922a_wow_wakeup_regs,
        .cfo_src_fd             = true,
        .cfo_hw_comp            = true,
        .dcfo_comp              = NULL,
index df22a53b8f41219d76e95a424b409c3f8f246bd6..a49265cda98f99fea3e164ab5cce8eed24d92e74 100644 (file)
@@ -723,13 +723,18 @@ static void rtw89_wow_show_wakeup_reason(struct rtw89_dev *rtwdev)
 {
        struct rtw89_wow_param *rtw_wow = &rtwdev->wow;
        struct rtw89_wow_aoac_report *aoac_rpt = &rtw_wow->aoac_rpt;
-       u32 wow_reason_reg = rtwdev->chip->wow_reason_reg;
        struct cfg80211_wowlan_nd_info nd_info;
        struct cfg80211_wowlan_wakeup wakeup = {
                .pattern_idx = -1,
        };
+       u32 wow_reason_reg;
        u8 reason;
 
+       if (RTW89_CHK_FW_FEATURE(WOW_REASON_V1, &rtwdev->fw))
+               wow_reason_reg = rtwdev->chip->wow_reason_reg[RTW89_WOW_REASON_V1];
+       else
+               wow_reason_reg = rtwdev->chip->wow_reason_reg[RTW89_WOW_REASON_V0];
+
        reason = rtw89_read8(rtwdev, wow_reason_reg);
        switch (reason) {
        case RTW89_WOW_RSN_RX_DEAUTH: