]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: marvell: pxa1908: Add power domains
authorDuje Mihanović <duje@dujemihanovic.xyz>
Sat, 13 Sep 2025 21:12:51 +0000 (23:12 +0200)
committerDuje Mihanović <duje@dujemihanovic.xyz>
Mon, 13 Oct 2025 10:11:38 +0000 (12:11 +0200)
Update the APMU clock controller's compatible to allow the new power
domain driver to probe. Also add the first two power domain consumers:
IOMMU (fixes probing) and framebuffer.

Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz>
arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi

index 10e6730d71b6a052d57ce84b7ab051d424621726..b2ce5edd9c6ac6016479a32e9cccb591b74ca7c2 100644 (file)
@@ -24,6 +24,7 @@
                fb0: framebuffer@17177000 {
                        compatible = "simple-framebuffer";
                        reg = <0 0x17177000 0 (480 * 800 * 4)>;
+                       power-domains = <&apmu PXA1908_POWER_DOMAIN_DSI>;
                        width = <480>;
                        height = <800>;
                        stride = <(480 * 4)>;
index deb1a9df27c2f7c946096c05a684c3f1f0f16d6c..5778bfdb85675e996f3ad1fae4d1ba4d21548365 100644 (file)
@@ -3,6 +3,7 @@
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/marvell,pxa1908.h>
+#include <dt-bindings/power/marvell,pxa1908-power.h>
 
 / {
        model = "Marvell Armada PXA1908";
@@ -93,6 +94,7 @@
                        #iommu-cells = <1>;
                        interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
+                       power-domains = <&apmu PXA1908_POWER_DOMAIN_VPU>;
                        status = "disabled";
                };
 
                        };
 
                        apmu: clock-controller@82800 {
-                               compatible = "marvell,pxa1908-apmu";
+                               compatible = "marvell,pxa1908-apmu", "syscon";
                                reg = <0x82800 0x400>;
                                #clock-cells = <1>;
+                               #power-domain-cells = <1>;
                        };
                };
        };