]> git.ipfire.org Git - thirdparty/ipxe.git/commitdiff
[realtek] Use read-modify-write to check for C+ Command register
authorMichael Brown <mcb30@ipxe.org>
Thu, 23 Aug 2012 11:38:37 +0000 (12:38 +0100)
committerMichael Brown <mcb30@ipxe.org>
Thu, 23 Aug 2012 14:15:42 +0000 (15:15 +0100)
Some bits in the C+ Command register are always one.  Testing for the
presence of the register must allow for this.

Signed-off-by: Michael Brown <mcb30@ipxe.org>
src/drivers/net/realtek.c

index 77df64e61bc578e32bc42376f150d4edd21b90a5..f63f25f27473ef03c5bb5f425f5ae96aaf869337 100644 (file)
@@ -879,8 +879,9 @@ static void realtek_detect ( struct realtek_nic *rtl ) {
         * Try to enable C+ mode and PCI Dual Address Cycle (for
         * 64-bit systems), if supported.
         */
-       cpcr = ( RTL_CPCR_DAC | RTL_CPCR_MULRW | RTL_CPCR_CPRX |
-                RTL_CPCR_CPTX );
+       cpcr = readw ( rtl->regs + RTL_CPCR );
+       cpcr |= ( RTL_CPCR_DAC | RTL_CPCR_MULRW | RTL_CPCR_CPRX |
+                 RTL_CPCR_CPTX );
        writew ( cpcr, rtl->regs + RTL_CPCR );
        check_cpcr = readw ( rtl->regs + RTL_CPCR );
 
@@ -890,7 +891,7 @@ static void realtek_detect ( struct realtek_nic *rtl ) {
                rtl->have_phy_regs = 1;
                rtl->tppoll = RTL_TPPOLL_8169;
        } else {
-               if ( check_cpcr == cpcr ) {
+               if ( ( check_cpcr == cpcr ) && ( cpcr != 0xffff ) ) {
                        DBGC ( rtl, "REALTEK %p appears to be an RTL8139C+\n",
                               rtl );
                        rtl->tppoll = RTL_TPPOLL_8139CP;