2014-06-24 Catherine Moore <clm@codesourcery.com>

	    Sandra Loosemore  <sandra@codesourcery.com>

	gcc/
	* config/mips/mips.c (mips_order_regs_for_local_alloc): Delete.
	* config/mips/mips.h (ADJUST_REG_ALLOC_ORDER): Delete.
	* config/mips/mips-protos.h (mips_order_regs_for_local_alloc): Delete.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@211959 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f603d196b83da6a2dc4c9a50bbaf7ae63bb95dbe..c8cc0b403b1f3bd302115b738462344981884bab 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2014-06-24  Catherine Moore  <clm@codesourcery.com>
+           Sandra Loosemore  <sandra@codesourcery.com>
+
+       * config/mips/mips.c (mips_order_regs_for_local_alloc): Delete.
+       * config/mips/mips.h (ADJUST_REG_ALLOC_ORDER): Delete.
+       * config/mips/mips-protos.h (mips_order_regs_for_local_alloc): Delete.
+
 2014-06-24  Marc Glisse  <marc.glisse@inria.fr>
 
        * doc/invoke.texi (Warning Options): Remove duplicated

diff --git a/gcc/config/mips/mips-protos.h b/gcc/config/mips/mips-protos.h
index 0b32a70251c7997b7c115596d4e98304b7c451ee..8a517ee02ea7cbaf7e80b701cd866fad93fcf5f7 100644 (file)
--- a/gcc/config/mips/mips-protos.h
+++ b/gcc/config/mips/mips-protos.h
@@ -247,7 +247,6 @@ extern bool mips_expand_ext_as_unaligned_load (rtx, rtx, HOST_WIDE_INT,
 extern bool mips_expand_ins_as_unaligned_store (rtx, rtx, HOST_WIDE_INT,
                                                HOST_WIDE_INT);
 extern bool mips_mem_fits_mode_p (enum machine_mode mode, rtx x);
-extern void mips_order_regs_for_local_alloc (void);
 extern HOST_WIDE_INT mips_debugger_offset (rtx, HOST_WIDE_INT);
 
 extern void mips_push_asm_switch (struct mips_asm_switch *);

diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index b1504ee621e471402a486b56f3f2c621ffb0e774..10efc270298a1f876efc9acb7c7abac7eaec5993 100644 (file)
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -17497,28 +17497,6 @@ mips_conditional_register_usage (void)
     }
 }
 
-/* When generating MIPS16 code, we want to allocate $24 (T_REG) before
-   other registers for instructions for which it is possible.  This
-   encourages the compiler to use CMP in cases where an XOR would
-   require some register shuffling.  */
-
-void
-mips_order_regs_for_local_alloc (void)
-{
-  int i;
-
-  for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
-    reg_alloc_order[i] = i;
-
-  if (TARGET_MIPS16)
-    {
-      /* It really doesn't matter where we put register 0, since it is
-         a fixed register anyhow.  */
-      reg_alloc_order[0] = 24;
-      reg_alloc_order[24] = 0;
-    }
-}
-
 /* Implement EH_USES.  */
 
 bool

diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index 7029e046f9a248a3b18bf15e99a9ddfe3dcc263d..1164b4b18085431d52fc0872eaa6f26e83e9e0b4 100644 (file)
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -2046,13 +2046,6 @@ enum reg_class
   182,183,184,185,186,187                                              \
 }
 
-/* ADJUST_REG_ALLOC_ORDER is a macro which permits reg_alloc_order
-   to be rearranged based on a particular function.  On the mips16, we
-   want to allocate $24 (T_REG) before other registers for
-   instructions for which it is possible.  */
-
-#define ADJUST_REG_ALLOC_ORDER mips_order_regs_for_local_alloc ()
-
 /* True if VALUE is an unsigned 6-bit number.  */
 
 #define UIMM6_OPERAND(VALUE) \