]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
PCI: mediatek-gen3: Rely on clk_bulk_prepare_enable() in mtk_pcie_en7581_power_up()
authorLorenzo Bianconi <lorenzo@kernel.org>
Wed, 8 Jan 2025 09:50:40 +0000 (10:50 +0100)
committerKrzysztof Wilczyński <kwilczynski@kernel.org>
Mon, 13 Jan 2025 07:04:45 +0000 (07:04 +0000)
Replace clk_bulk_prepare() and clk_bulk_enable() with
clk_bulk_prepare_enable() in mtk_pcie_en7581_power_up() routine.

Link: https://lore.kernel.org/r/20250108-pcie-en7581-fixes-v6-1-21ac939a3b9b@kernel.org
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
drivers/pci/controller/pcie-mediatek-gen3.c

index be52e3a123abd0d0086f9f1a603e3abaa18f319f..886d458df40d009424c2ae6f1564f51a669643ad 100644 (file)
@@ -945,12 +945,6 @@ static int mtk_pcie_en7581_power_up(struct mtk_gen3_pcie *pcie)
        pm_runtime_enable(dev);
        pm_runtime_get_sync(dev);
 
-       err = clk_bulk_prepare(pcie->num_clks, pcie->clks);
-       if (err) {
-               dev_err(dev, "failed to prepare clock\n");
-               goto err_clk_prepare;
-       }
-
        val = FIELD_PREP(PCIE_VAL_LN0_DOWNSTREAM, 0x47) |
              FIELD_PREP(PCIE_VAL_LN1_DOWNSTREAM, 0x47) |
              FIELD_PREP(PCIE_VAL_LN0_UPSTREAM, 0x41) |
@@ -963,17 +957,15 @@ static int mtk_pcie_en7581_power_up(struct mtk_gen3_pcie *pcie)
              FIELD_PREP(PCIE_K_FINETUNE_MAX, 0xf);
        writel_relaxed(val, pcie->base + PCIE_PIPE4_PIE8_REG);
 
-       err = clk_bulk_enable(pcie->num_clks, pcie->clks);
+       err = clk_bulk_prepare_enable(pcie->num_clks, pcie->clks);
        if (err) {
                dev_err(dev, "failed to prepare clock\n");
-               goto err_clk_enable;
+               goto err_clk_prepare_enable;
        }
 
        return 0;
 
-err_clk_enable:
-       clk_bulk_unprepare(pcie->num_clks, pcie->clks);
-err_clk_prepare:
+err_clk_prepare_enable:
        pm_runtime_put_sync(dev);
        pm_runtime_disable(dev);
        reset_control_bulk_assert(pcie->soc->phy_resets.num_resets, pcie->phy_resets);