Add gpr and fpr names for the o64 ABI to objdump.
With the recent addition of both EABIs, this completes support for the
standard ABI options (ABI-breaking options such as -modd-spreg or
-mabi=32 -mfp64 notwithstanding). The names have been verified against
GCC's usage of the registers. Notably, the only(?) documentation that
defines the o64 ABI at
https://gcc.gnu.org/projects/mipso64-abi.html
appears to contain a mistake w.r.t. floating-point arguments. In
particular:
> If the first and second arguments floating-point arguments to a
> function are 32-bit values, they are passed in $f12 and $f14.
As from 4.0.0 this does not happen in GCC's implementation of the ABI;
a pair of single-float arguments are still passed in $f12 and $f13, the
same as when one or both of the arguments are double-precision floats.
The registers $f12, $f13 and $f14 have been named $fa0, $fa1 and $ft10
to match the implementation.
Signed-off-by: Maximilian Ciric <max.ciric@gmail.com>
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric,fpr-names=o64
+#name: MIPS FPR disassembly (o64)
+#source: fpr-names.s
+
+# Check objdump's handling of -M fpr-names=foo options.
+
+.*: +file format .*mips.*
+
+Disassembly of section .text:
+0+0000 <[^>]*> 44800000 mtc1 \$0,fv0
+0+0004 <[^>]*> 44800800 mtc1 \$0,fv1
+0+0008 <[^>]*> 44801000 mtc1 \$0,ft0
+0+000c <[^>]*> 44801800 mtc1 \$0,ft1
+0+0010 <[^>]*> 44802000 mtc1 \$0,ft2
+0+0014 <[^>]*> 44802800 mtc1 \$0,ft3
+0+0018 <[^>]*> 44803000 mtc1 \$0,ft4
+0+001c <[^>]*> 44803800 mtc1 \$0,ft5
+0+0020 <[^>]*> 44804000 mtc1 \$0,ft6
+0+0024 <[^>]*> 44804800 mtc1 \$0,ft7
+0+0028 <[^>]*> 44805000 mtc1 \$0,ft8
+0+002c <[^>]*> 44805800 mtc1 \$0,ft9
+0+0030 <[^>]*> 44806000 mtc1 \$0,fa0
+0+0034 <[^>]*> 44806800 mtc1 \$0,fa1
+0+0038 <[^>]*> 44807000 mtc1 \$0,ft10
+0+003c <[^>]*> 44807800 mtc1 \$0,ft11
+0+0040 <[^>]*> 44808000 mtc1 \$0,ft12
+0+0044 <[^>]*> 44808800 mtc1 \$0,ft13
+0+0048 <[^>]*> 44809000 mtc1 \$0,ft14
+0+004c <[^>]*> 44809800 mtc1 \$0,ft15
+0+0050 <[^>]*> 4480a000 mtc1 \$0,fs0
+0+0054 <[^>]*> 4480a800 mtc1 \$0,fs1
+0+0058 <[^>]*> 4480b000 mtc1 \$0,fs2
+0+005c <[^>]*> 4480b800 mtc1 \$0,fs3
+0+0060 <[^>]*> 4480c000 mtc1 \$0,fs4
+0+0064 <[^>]*> 4480c800 mtc1 \$0,fs5
+0+0068 <[^>]*> 4480d000 mtc1 \$0,fs6
+0+006c <[^>]*> 4480d800 mtc1 \$0,fs7
+0+0070 <[^>]*> 4480e000 mtc1 \$0,fs8
+0+0074 <[^>]*> 4480e800 mtc1 \$0,fs9
+0+0078 <[^>]*> 4480f000 mtc1 \$0,fs10
+0+007c <[^>]*> 4480f800 mtc1 \$0,fs11
+ \.\.\.
--- /dev/null
+#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=o64
+#name: MIPS GPR disassembly (o64)
+#source: gpr-names.s
+#dump: gpr-names-32.d
# register names.
run_dump_test "gpr-names-numeric"
run_dump_test "gpr-names-32"
+ run_dump_test "gpr-names-o64"
run_dump_test "gpr-names-n32"
run_dump_test "gpr-names-64"
run_dump_test "gpr-names-eabi32"
run_dump_test "fpr-names-numeric"
run_dump_test "fpr-names-32"
+ run_dump_test "fpr-names-o64"
run_dump_test "fpr-names-n32"
run_dump_test "fpr-names-64"
run_dump_test "fpr-names-eabi32"
"fs2", "fs2f", "fs3", "fs3f", "fs4", "fs4f", "fs5", "fs5f"
};
+static const char * const mips_fpr_names_o64[32] =
+{
+ "fv0", "fv1", "ft0", "ft1", "ft2", "ft3", "ft4", "ft5",
+ "ft6", "ft7", "ft8", "ft9", "fa0", "fa1", "ft10", "ft11",
+ "ft12", "ft13", "ft14", "ft15", "fs0", "fs1", "fs2", "fs3",
+ "fs4", "fs5", "fs6", "fs7", "fs8", "fs9", "fs10", "fs11",
+};
+
static const char * const mips_fpr_names_n32[32] =
{
"fv0", "ft14", "fv1", "ft15", "ft0", "ft1", "ft2", "ft3",
{
{ "numeric", mips_gpr_names_numeric, mips_fpr_names_numeric },
{ "32", mips_gpr_names_oldabi, mips_fpr_names_32 },
+ { "o64", mips_gpr_names_oldabi, mips_fpr_names_o64 },
{ "n32", mips_gpr_names_newabi, mips_fpr_names_n32 },
{ "64", mips_gpr_names_newabi, mips_fpr_names_64 },
{ "eabi32", mips_gpr_names_newabi, mips_fpr_names_eabi32 },