Fixes for 5.15

Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/queue-5.15/pinctrl-aspeed-fix-confusing-types-in-return-value.patch b/queue-5.15/pinctrl-aspeed-fix-confusing-types-in-return-value.patch
new file mode 100644 (file)
index 0000000..da4e82e
--- /dev/null
+++ b/queue-5.15/pinctrl-aspeed-fix-confusing-types-in-return-value.patch
@@ -0,0 +1,38 @@
+From 2945756082f2bd68f4d020fc626a9ca5d05a8e45 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Fri, 20 Jan 2023 09:48:56 +1030
+Subject: pinctrl: aspeed: Fix confusing types in return value
+
+From: Joel Stanley <joel@jms.id.au>
+
+[ Upstream commit 287a344a11f1ebd31055cf9b22c88d7005f108d7 ]
+
+The function signature is int, but we return a bool. Instead return a
+negative errno as the kerneldoc suggests.
+
+Fixes: 4d3d0e4272d8 ("pinctrl: Add core support for Aspeed SoCs")
+Signed-off-by: Joel Stanley <joel@jms.id.au>
+Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
+Link: https://lore.kernel.org/r/20230119231856.52014-1-joel@jms.id.au
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/pinctrl/aspeed/pinctrl-aspeed.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.c b/drivers/pinctrl/aspeed/pinctrl-aspeed.c
+index 83d47ff1cea8f..5a12fc7cf91fb 100644
+--- a/drivers/pinctrl/aspeed/pinctrl-aspeed.c
++++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.c
+@@ -122,7 +122,7 @@ static int aspeed_disable_sig(struct aspeed_pinmux_data *ctx,
+       int ret = 0;
+ 
+       if (!exprs)
+-              return true;
++              return -EINVAL;
+ 
+       while (*exprs && !ret) {
+               ret = aspeed_sig_expr_disable(ctx, *exprs);
+-- 
+2.39.0
+

diff --git a/queue-5.15/pinctrl-intel-restore-the-pins-that-used-to-be-in-di.patch b/queue-5.15/pinctrl-intel-restore-the-pins-that-used-to-be-in-di.patch
new file mode 100644 (file)
index 0000000..5544a34
--- /dev/null
+++ b/queue-5.15/pinctrl-intel-restore-the-pins-that-used-to-be-in-di.patch
@@ -0,0 +1,69 @@
+From 22612aa5109f00e65a02cb32f5137785f5db7c87 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Mon, 6 Feb 2023 16:15:59 +0200
+Subject: pinctrl: intel: Restore the pins that used to be in Direct IRQ mode
+
+From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
+
+[ Upstream commit a8520be3ffef3d25b53bf171a7ebe17ee0154175 ]
+
+If the firmware mangled the register contents too much,
+check the saved value for the Direct IRQ mode. If it
+matches, we will restore the pin state.
+
+Reported-by: Jim Minter <jimminter@microsoft.com>
+Fixes: 6989ea4881c8 ("pinctrl: intel: Save and restore pins in "direct IRQ" mode")
+Tested-by: Jim Minter <jimminter@microsoft.com>
+Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
+Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
+Link: https://lore.kernel.org/r/20230206141558.20916-1-andriy.shevchenko@linux.intel.com
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/pinctrl/intel/pinctrl-intel.c | 16 +++++++++++++---
+ 1 file changed, 13 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c
+index 32807aab9343f..cc64eda155f57 100644
+--- a/drivers/pinctrl/intel/pinctrl-intel.c
++++ b/drivers/pinctrl/intel/pinctrl-intel.c
+@@ -1661,6 +1661,12 @@ const struct intel_pinctrl_soc_data *intel_pinctrl_get_soc_data(struct platform_
+ EXPORT_SYMBOL_GPL(intel_pinctrl_get_soc_data);
+ 
+ #ifdef CONFIG_PM_SLEEP
++static bool __intel_gpio_is_direct_irq(u32 value)
++{
++      return (value & PADCFG0_GPIROUTIOXAPIC) && (value & PADCFG0_GPIOTXDIS) &&
++             (__intel_gpio_get_gpio_mode(value) == PADCFG0_PMODE_GPIO);
++}
++
+ static bool intel_pinctrl_should_save(struct intel_pinctrl *pctrl, unsigned int pin)
+ {
+       const struct pin_desc *pd = pin_desc_get(pctrl->pctldev, pin);
+@@ -1694,8 +1700,7 @@ static bool intel_pinctrl_should_save(struct intel_pinctrl *pctrl, unsigned int
+        * See https://bugzilla.kernel.org/show_bug.cgi?id=214749.
+        */
+       value = readl(intel_get_padcfg(pctrl, pin, PADCFG0));
+-      if ((value & PADCFG0_GPIROUTIOXAPIC) && (value & PADCFG0_GPIOTXDIS) &&
+-          (__intel_gpio_get_gpio_mode(value) == PADCFG0_PMODE_GPIO))
++      if (__intel_gpio_is_direct_irq(value))
+               return true;
+ 
+       return false;
+@@ -1825,7 +1830,12 @@ int intel_pinctrl_resume_noirq(struct device *dev)
+       for (i = 0; i < pctrl->soc->npins; i++) {
+               const struct pinctrl_pin_desc *desc = &pctrl->soc->pins[i];
+ 
+-              if (!intel_pinctrl_should_save(pctrl, desc->number))
++              if (!(intel_pinctrl_should_save(pctrl, desc->number) ||
++                    /*
++                     * If the firmware mangled the register contents too much,
++                     * check the saved value for the Direct IRQ mode.
++                     */
++                    __intel_gpio_is_direct_irq(pads[i].padcfg0)))
+                       continue;
+ 
+               intel_restore_padcfg(pctrl, desc->number, PADCFG0, pads[i].padcfg0);
+-- 
+2.39.0
+

diff --git a/queue-5.15/pinctrl-mediatek-fix-the-drive-register-definition-o.patch b/queue-5.15/pinctrl-mediatek-fix-the-drive-register-definition-o.patch
new file mode 100644 (file)
index 0000000..4fecf52
--- /dev/null
+++ b/queue-5.15/pinctrl-mediatek-fix-the-drive-register-definition-o.patch
@@ -0,0 +1,48 @@
+From a841d865d1514a48f38fda18c3cbb33a303802ed Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Wed, 18 Jan 2023 14:21:16 +0800
+Subject: pinctrl: mediatek: Fix the drive register definition of some Pins
+
+From: Guodong Liu <Guodong.Liu@mediatek.com>
+
+[ Upstream commit 5754a1c98b18009cb3030dc391aa37b77428a0bd ]
+
+The drive adjustment register definition of gpio13 and gpio81 is wrong:
+"the start address for the range" of gpio18 is corrected to 0x000,
+"the start bit for the first register within the range" of gpio81 is
+corrected to 24.
+
+Fixes: 6cf5e9ef362a ("pinctrl: add pinctrl driver on mt8195")
+Signed-off-by: Guodong Liu <Guodong.Liu@mediatek.com>
+Link: https://lore.kernel.org/r/20230118062116.26315-1-Guodong.Liu@mediatek.com
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/pinctrl/mediatek/pinctrl-mt8195.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8195.c b/drivers/pinctrl/mediatek/pinctrl-mt8195.c
+index a7500e18bb1de..c32884fc7de79 100644
+--- a/drivers/pinctrl/mediatek/pinctrl-mt8195.c
++++ b/drivers/pinctrl/mediatek/pinctrl-mt8195.c
+@@ -659,7 +659,7 @@ static const struct mtk_pin_field_calc mt8195_pin_drv_range[] = {
+       PIN_FIELD_BASE(10, 10, 4, 0x010, 0x10, 9, 3),
+       PIN_FIELD_BASE(11, 11, 4, 0x000, 0x10, 24, 3),
+       PIN_FIELD_BASE(12, 12, 4, 0x010, 0x10, 12, 3),
+-      PIN_FIELD_BASE(13, 13, 4, 0x010, 0x10, 27, 3),
++      PIN_FIELD_BASE(13, 13, 4, 0x000, 0x10, 27, 3),
+       PIN_FIELD_BASE(14, 14, 4, 0x010, 0x10, 15, 3),
+       PIN_FIELD_BASE(15, 15, 4, 0x010, 0x10, 0, 3),
+       PIN_FIELD_BASE(16, 16, 4, 0x010, 0x10, 18, 3),
+@@ -708,7 +708,7 @@ static const struct mtk_pin_field_calc mt8195_pin_drv_range[] = {
+       PIN_FIELD_BASE(78, 78, 3, 0x000, 0x10, 15, 3),
+       PIN_FIELD_BASE(79, 79, 3, 0x000, 0x10, 18, 3),
+       PIN_FIELD_BASE(80, 80, 3, 0x000, 0x10, 21, 3),
+-      PIN_FIELD_BASE(81, 81, 3, 0x000, 0x10, 28, 3),
++      PIN_FIELD_BASE(81, 81, 3, 0x000, 0x10, 24, 3),
+       PIN_FIELD_BASE(82, 82, 3, 0x000, 0x10, 27, 3),
+       PIN_FIELD_BASE(83, 83, 3, 0x010, 0x10, 0, 3),
+       PIN_FIELD_BASE(84, 84, 3, 0x010, 0x10, 3, 3),
+-- 
+2.39.0
+

diff --git a/queue-5.15/pinctrl-single-fix-potential-null-dereference.patch b/queue-5.15/pinctrl-single-fix-potential-null-dereference.patch
new file mode 100644 (file)
index 0000000..c9bca80
--- /dev/null
+++ b/queue-5.15/pinctrl-single-fix-potential-null-dereference.patch
@@ -0,0 +1,41 @@
+From 5815d397b02f78134191557a9765c965b079da1b Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Fri, 18 Nov 2022 13:43:32 +0300
+Subject: pinctrl: single: fix potential NULL dereference
+
+From: Maxim Korotkov <korotkov.maxim.s@gmail.com>
+
+[ Upstream commit d2d73e6d4822140445ad4a7b1c6091e0f5fe703b ]
+
+Added checking of pointer "function" in pcs_set_mux().
+pinmux_generic_get_function() can return NULL and the pointer
+"function" was dereferenced without checking against NULL.
+
+Found by Linux Verification Center (linuxtesting.org) with SVACE.
+
+Fixes: 571aec4df5b7 ("pinctrl: single: Use generic pinmux helpers for managing functions")
+Signed-off-by: Maxim Korotkov <korotkov.maxim.s@gmail.com>
+Reviewed-by: Tony Lindgren <tony@atomide.com>
+Link: https://lore.kernel.org/r/20221118104332.943-1-korotkov.maxim.s@gmail.com
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/pinctrl/pinctrl-single.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
+index 414ee6bb8ac98..9ad8f70206142 100644
+--- a/drivers/pinctrl/pinctrl-single.c
++++ b/drivers/pinctrl/pinctrl-single.c
+@@ -372,6 +372,8 @@ static int pcs_set_mux(struct pinctrl_dev *pctldev, unsigned fselector,
+       if (!pcs->fmask)
+               return 0;
+       function = pinmux_generic_get_function(pctldev, fselector);
++      if (!function)
++              return -EINVAL;
+       func = function->data;
+       if (!func)
+               return -EINVAL;
+-- 
+2.39.0
+

diff --git a/queue-5.15/series b/queue-5.15/series
index 55a519a77728e47a586c5c000390a0912fef6711..216558cda92a27d51527c0603042cdcee166d8d5 100644 (file)
--- a/queue-5.15/series
+++ b/queue-5.15/series
@@ -41,3 +41,8 @@ selftests-forwarding-lib-quote-the-sysctl-values.patch
 alsa-pci-lx6464es-fix-a-debug-loop.patch
 riscv-stacktrace-fix-missing-the-first-frame.patch
 asoc-topology-return-enomem-on-memory-allocation-fai.patch
+pinctrl-mediatek-fix-the-drive-register-definition-o.patch
+pinctrl-aspeed-fix-confusing-types-in-return-value.patch
+pinctrl-single-fix-potential-null-dereference.patch
+spi-dw-fix-wrong-fifo-level-setting-for-long-xfers.patch
+pinctrl-intel-restore-the-pins-that-used-to-be-in-di.patch

diff --git a/queue-5.15/spi-dw-fix-wrong-fifo-level-setting-for-long-xfers.patch b/queue-5.15/spi-dw-fix-wrong-fifo-level-setting-for-long-xfers.patch
new file mode 100644 (file)
index 0000000..f36c34f
--- /dev/null
+++ b/queue-5.15/spi-dw-fix-wrong-fifo-level-setting-for-long-xfers.patch
@@ -0,0 +1,47 @@
+From ad0387d25ebc015478a659a25905b23e54cac6c2 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Fri, 13 Jan 2023 21:59:42 +0300
+Subject: spi: dw: Fix wrong FIFO level setting for long xfers
+
+From: Serge Semin <Sergey.Semin@baikalelectronics.ru>
+
+[ Upstream commit c63b8fd14a7db719f8252038a790638728c4eb66 ]
+
+Due to using the u16 type in the min_t() macros the SPI transfer length
+will be cast to word before participating in the conditional statement
+implied by the macro. Thus if the transfer length is greater than 64KB the
+Tx/Rx FIFO threshold level value will be determined by the leftover of the
+truncated after the type-case length. In the worst case it will cause the
+dramatical performance drop due to the "Tx FIFO Empty" or "Rx FIFO Full"
+interrupts triggered on each xfer word sent/received to/from the bus.
+
+The problem can be easily fixed by specifying the unsigned int type in the
+min_t() macros thus preventing the possible data loss.
+
+Fixes: ea11370fffdf ("spi: dw: get TX level without an additional variable")
+Reported-by: Sergey Nazarov <Sergey.Nazarov@baikalelectronics.ru>
+Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
+Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
+Link: https://lore.kernel.org/r/20230113185942.2516-1-Sergey.Semin@baikalelectronics.ru
+Signed-off-by: Mark Brown <broonie@kernel.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/spi/spi-dw-core.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c
+index a305074c482e8..59e22c6b4b201 100644
+--- a/drivers/spi/spi-dw-core.c
++++ b/drivers/spi/spi-dw-core.c
+@@ -357,7 +357,7 @@ static void dw_spi_irq_setup(struct dw_spi *dws)
+        * will be adjusted at the final stage of the IRQ-based SPI transfer
+        * execution so not to lose the leftover of the incoming data.
+        */
+-      level = min_t(u16, dws->fifo_len / 2, dws->tx_len);
++      level = min_t(unsigned int, dws->fifo_len / 2, dws->tx_len);
+       dw_writel(dws, DW_SPI_TXFTLR, level);
+       dw_writel(dws, DW_SPI_RXFTLR, level - 1);
+ 
+-- 
+2.39.0
+