]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
clk: qcom: smd-rpm: Add clocks for MSM8940
authorDaniil Titov <daniilt971@gmail.com>
Tue, 31 Dec 2024 16:00:52 +0000 (17:00 +0100)
committerBjorn Andersson <andersson@kernel.org>
Wed, 8 Jan 2025 03:06:13 +0000 (21:06 -0600)
MSM8940 has mostly the same rpm clocks as MSM8953, but lacks RF_CLK3.

Signed-off-by: Daniil Titov <daniilt971@gmail.com>
Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org>
Link: https://lore.kernel.org/r/20241231-rpmcc-v1-4-1212df9b2042@mainlining.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
drivers/clk/qcom/clk-smd-rpm.c

index 2d0d450dbd055837f11d1d0e4cfafc48614598b0..29ef08a9d50b47fb71ac253c6f50f4c28f4d6519 100644 (file)
@@ -721,6 +721,34 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8937 = {
        .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_smmnoc_icc_clks),
 };
 
+static struct clk_smd_rpm *msm8940_clks[] = {
+       [RPM_SMD_XO_CLK_SRC]            = &clk_smd_rpm_branch_bi_tcxo,
+       [RPM_SMD_XO_A_CLK_SRC]          = &clk_smd_rpm_branch_bi_tcxo_a,
+       [RPM_SMD_IPA_CLK]               = &clk_smd_rpm_ipa_clk,
+       [RPM_SMD_IPA_A_CLK]             = &clk_smd_rpm_ipa_a_clk,
+       [RPM_SMD_QDSS_CLK]              = &clk_smd_rpm_qdss_clk,
+       [RPM_SMD_QDSS_A_CLK]            = &clk_smd_rpm_qdss_a_clk,
+       [RPM_SMD_BB_CLK1]               = &clk_smd_rpm_bb_clk1,
+       [RPM_SMD_BB_CLK1_A]             = &clk_smd_rpm_bb_clk1_a,
+       [RPM_SMD_BB_CLK2]               = &clk_smd_rpm_bb_clk2,
+       [RPM_SMD_BB_CLK2_A]             = &clk_smd_rpm_bb_clk2_a,
+       [RPM_SMD_RF_CLK2]               = &clk_smd_rpm_rf_clk2,
+       [RPM_SMD_RF_CLK2_A]             = &clk_smd_rpm_rf_clk2_a,
+       [RPM_SMD_DIV_CLK2]              = &clk_smd_rpm_div_clk2,
+       [RPM_SMD_DIV_A_CLK2]            = &clk_smd_rpm_div_clk2_a,
+       [RPM_SMD_BB_CLK1_PIN]           = &clk_smd_rpm_bb_clk1_pin,
+       [RPM_SMD_BB_CLK1_A_PIN]         = &clk_smd_rpm_bb_clk1_a_pin,
+       [RPM_SMD_BB_CLK2_PIN]           = &clk_smd_rpm_bb_clk2_pin,
+       [RPM_SMD_BB_CLK2_A_PIN]         = &clk_smd_rpm_bb_clk2_a_pin,
+};
+
+static const struct rpm_smd_clk_desc rpm_clk_msm8940 = {
+       .clks = msm8940_clks,
+       .num_clks = ARRAY_SIZE(msm8940_clks),
+       .icc_clks = bimc_pcnoc_snoc_smmnoc_icc_clks,
+       .num_icc_clks = ARRAY_SIZE(bimc_pcnoc_snoc_smmnoc_icc_clks),
+};
+
 static struct clk_smd_rpm *msm8974_clks[] = {
        [RPM_SMD_XO_CLK_SRC]            = &clk_smd_rpm_branch_bi_tcxo,
        [RPM_SMD_XO_A_CLK_SRC]          = &clk_smd_rpm_branch_bi_tcxo_a,
@@ -1238,6 +1266,7 @@ static const struct of_device_id rpm_smd_clk_match_table[] = {
        { .compatible = "qcom,rpmcc-msm8917", .data = &rpm_clk_msm8917 },
        { .compatible = "qcom,rpmcc-msm8936", .data = &rpm_clk_msm8936 },
        { .compatible = "qcom,rpmcc-msm8937", .data = &rpm_clk_msm8937 },
+       { .compatible = "qcom,rpmcc-msm8940", .data = &rpm_clk_msm8940 },
        { .compatible = "qcom,rpmcc-msm8953", .data = &rpm_clk_msm8953 },
        { .compatible = "qcom,rpmcc-msm8974", .data = &rpm_clk_msm8974 },
        { .compatible = "qcom,rpmcc-msm8976", .data = &rpm_clk_msm8976 },