--- /dev/null
+From b04ada92ffaabb868497a1fce8e4f6bf74e5488f Mon Sep 17 00:00:00 2001
+From: Tomas Winkler <tomas.winkler@intel.com>
+Date: Mon, 12 May 2014 12:19:39 +0300
+Subject: mei: me: fix hw ready reset flow
+
+From: Tomas Winkler <tomas.winkler@intel.com>
+
+commit b04ada92ffaabb868497a1fce8e4f6bf74e5488f upstream.
+
+We cleared H_RST for H_CSR on spurious interrupt generated when ME_RDY
+while cleared and not while ME_RDY is set. The spurious interrupt
+is not delivered on all platforms in this case the
+driver may fail to initialize.
+
+Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
+Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/misc/mei/hw-me.c | 14 +++++++-------
+ 1 file changed, 7 insertions(+), 7 deletions(-)
+
+--- a/drivers/misc/mei/hw-me.c
++++ b/drivers/misc/mei/hw-me.c
+@@ -164,6 +164,9 @@ static void mei_me_hw_reset_release(stru
+ hcsr |= H_IG;
+ hcsr &= ~H_RST;
+ mei_hcsr_set(hw, hcsr);
++
++ /* complete this write before we set host ready on another CPU */
++ mmiowb();
+ }
+ /**
+ * mei_me_hw_reset - resets fw via mei csr register.
+@@ -214,6 +217,7 @@ static void mei_me_hw_reset(struct mei_d
+ static void mei_me_host_set_ready(struct mei_device *dev)
+ {
+ struct mei_me_hw *hw = to_me_hw(dev);
++ hw->host_hw_state = mei_hcsr_read(hw);
+ hw->host_hw_state |= H_IE | H_IG | H_RDY;
+ mei_hcsr_set(hw, hw->host_hw_state);
+ }
+@@ -506,19 +510,15 @@ irqreturn_t mei_me_irq_thread_handler(in
+ /* check if we need to start the dev */
+ if (!mei_host_is_ready(dev)) {
+ if (mei_hw_is_ready(dev)) {
++ mei_me_hw_reset_release(dev);
+ dev_dbg(&dev->pdev->dev, "we need to start the dev.\n");
+
+ dev->recvd_hw_ready = true;
+ wake_up_interruptible(&dev->wait_hw_ready);
+-
+- mutex_unlock(&dev->device_lock);
+- return IRQ_HANDLED;
+ } else {
+- dev_dbg(&dev->pdev->dev, "Reset Completed.\n");
+- mei_me_hw_reset_release(dev);
+- mutex_unlock(&dev->device_lock);
+- return IRQ_HANDLED;
++ dev_dbg(&dev->pdev->dev, "Spurious Interrupt\n");
+ }
++ goto end;
+ }
+ /* check slots available for reading */
+ slots = mei_count_full_read_slots(dev);
--- /dev/null
+From c40765d919d25d2d44d99c4ce39e48808f137e1e Mon Sep 17 00:00:00 2001
+From: Tomas Winkler <tomas.winkler@intel.com>
+Date: Mon, 12 May 2014 12:19:41 +0300
+Subject: mei: me: read H_CSR after asserting reset
+
+From: Tomas Winkler <tomas.winkler@intel.com>
+
+commit c40765d919d25d2d44d99c4ce39e48808f137e1e upstream.
+
+According the spec the host should read H_CSR again
+after asserting reset H_RST to ensure that reset was
+read by the firmware
+
+Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
+Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/misc/mei/hw-me.c | 14 +++++++++++++-
+ 1 file changed, 13 insertions(+), 1 deletion(-)
+
+--- a/drivers/misc/mei/hw-me.c
++++ b/drivers/misc/mei/hw-me.c
+@@ -186,7 +186,19 @@ static void mei_me_hw_reset(struct mei_d
+ dev->recvd_hw_ready = false;
+ mei_me_reg_write(hw, H_CSR, hcsr);
+
+- if (dev->dev_state == MEI_DEV_POWER_DOWN)
++ /*
++ * Host reads the H_CSR once to ensure that the
++ * posted write to H_CSR completes.
++ */
++ hcsr = mei_hcsr_read(hw);
++
++ if ((hcsr & H_RST) == 0)
++ dev_warn(&dev->pdev->dev, "H_RST is not set = 0x%08X", hcsr);
++
++ if ((hcsr & H_RDY) == H_RDY)
++ dev_warn(&dev->pdev->dev, "H_RDY is not cleared 0x%08X", hcsr);
++
++ if (intr_enable == false)
+ mei_me_hw_reset_release(dev);
+
+ dev_dbg(&dev->pdev->dev, "current HCSR = 0x%08x.\n", mei_hcsr_read(hw));