]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
ARM: gemini: add device tree for ssi1328
authorCorentin Labbe <clabbe@baylibre.com>
Fri, 18 Jun 2021 20:55:33 +0000 (20:55 +0000)
committerLinus Walleij <linus.walleij@linaro.org>
Thu, 23 Sep 2021 00:26:07 +0000 (02:26 +0200)
The SSI 1328 is a NAS box running a SL3516 SoC.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
arch/arm/boot/dts/Makefile
arch/arm/boot/dts/gemini-ssi1328.dts [new file with mode: 0644]

index 2e79ed07602a280b0fe2fac4c4b7354153870236..d2da53b7de4d44933f709c525437d9817172b23d 100644 (file)
@@ -223,6 +223,7 @@ dtb-$(CONFIG_ARCH_GEMINI) += \
        gemini-rut1xx.dtb \
        gemini-sl93512r.dtb \
        gemini-sq201.dtb \
+       gemini-ssi1328.dtb \
        gemini-wbd111.dtb \
        gemini-wbd222.dtb
 dtb-$(CONFIG_ARCH_HI3xxx) += \
diff --git a/arch/arm/boot/dts/gemini-ssi1328.dts b/arch/arm/boot/dts/gemini-ssi1328.dts
new file mode 100644 (file)
index 0000000..2b3e7db
--- /dev/null
@@ -0,0 +1,138 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2021 Corentin Labbe <clabbe@baylibre.com>
+ * Device Tree file for SSI 1328
+ */
+
+/dts-v1/;
+
+#include "gemini.dtsi"
+
+/ {
+       model = "SSI 1328";
+       compatible = "ssi,1328", "cortina,gemini";
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       memory@0 {
+               /* 128 MB */
+               device_type = "memory";
+               reg = <0x00000000 0x8000000>;
+       };
+
+       aliases {
+               mdio-gpio0 = &mdio0;
+       };
+
+       chosen {
+               bootargs = "console=ttyS0,19200n8 initrd=0x900000,9M";
+               stdout-path = &uart0;
+       };
+
+       mdio0: mdio {
+               compatible = "virtual,mdio-gpio";
+               gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
+                       <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               /* LAN Marvell 88E1118 */
+               phy0: ethernet-phy@1 {
+                       reg = <1>;
+                       device_type = "ethernet-phy";
+                       /* We lack the knowledge of necessary GPIO to achieve
+                        * Gigabit
+                        */
+                       max-speed = <100>;
+               };
+               /* WAN ICPlus IP101A */
+               phy1: ethernet-phy@2 {
+                       reg = <2>;
+                       device_type = "ethernet-phy";
+               };
+       };
+};
+
+&ethernet {
+       status = "okay";
+       ethernet-port@0 {
+               phy-mode = "rgmii";
+               phy-handle = <&phy0>;
+       };
+       ethernet-port@1 {
+               phy-mode = "rgmii";
+               phy-handle = <&phy1>;
+       };
+};
+
+&flash {
+       status = "okay";
+       /* 32MB of flash */
+       reg = <0x30000000 0x03200000>;
+
+       pinctrl-names = "enabled", "disabled";
+       pinctrl-0 = <&pflash_default_pins>;
+       pinctrl-1 = <&pflash_disabled_pins>;
+
+       partitions {
+               compatible = "redboot-fis";
+               /* Eraseblock at 0xfe0000 */
+               fis-index-block = <0x7F>;
+       };
+};
+
+&gpio0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&gpio0_default_pins>;
+};
+
+&ide0 {
+       status = "okay";
+};
+
+&ide1 {
+       status = "okay";
+};
+
+&sata {
+       cortina,gemini-ata-muxmode = <0>;
+       cortina,gemini-enable-sata-bridge;
+       status = "okay";
+};
+
+&syscon {
+       pinctrl {
+               /*
+                * gpio0agrp cover line 0-4
+                * gpio0bgrp cover line 5
+                */
+               gpio0_default_pins: pinctrl-gpio0 {
+                       mux {
+                               function = "gpio0";
+                               groups = "gpio0agrp", "gpio0bgrp";
+                       };
+               };
+               pflash_disabled_pins: pinctrl-pflash-disabled {
+                       mux {
+                               function = "gpio0";
+                               groups = "gpio0ggrp", "gpio0igrp", "gpio0jgrp",
+                                        "gpio0kgrp";
+                       };
+               };
+               pinctrl-gmii {
+                       /* This platform use both the ethernet ports */
+                       mux {
+                               function = "gmii";
+                               groups = "gmii_gmac0_grp", "gmii_gmac1_grp";
+                       };
+               };
+       };
+};
+
+&usb0 {
+       status = "okay";
+};
+
+&usb1 {
+       status = "okay";
+};