Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
- drivers/gpu/drm/amd/display/dc/core/dc.c | 18 ++++++++++++++++++
- drivers/gpu/drm/amd/display/dc/dc.h | 2 ++
- .../gpu/drm/amd/display/dc/inc/core_types.h | 1 +
- .../display/dc/resource/dcn31/dcn31_resource.c | 7 +++++++
- .../display/dc/resource/dcn31/dcn31_resource.h | 3 +++
- .../dc/resource/dcn314/dcn314_resource.c | 1 +
- .../dc/resource/dcn315/dcn315_resource.c | 1 +
- .../dc/resource/dcn316/dcn316_resource.c | 1 +
- .../display/dc/resource/dcn35/dcn35_resource.c | 1 +
- .../dc/resource/dcn351/dcn351_resource.c | 1 +
+ drivers/gpu/drm/amd/display/dc/core/dc.c | 18 ++++++++++
+ drivers/gpu/drm/amd/display/dc/dc.h | 2 +
+ drivers/gpu/drm/amd/display/dc/inc/core_types.h | 1
+ drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c | 7 +++
+ drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.h | 3 +
+ drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c | 1
+ drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c | 1
+ drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c | 1
+ drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c | 1
+ drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c | 1
10 files changed, 36 insertions(+)
-diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
-index 1d99ab233765f..dbf6724c34777 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
-@@ -6013,3 +6013,21 @@ struct dc_power_profile dc_get_power_profile_for_dc_state(const struct dc_state
+@@ -6006,3 +6006,21 @@ struct dc_power_profile dc_get_power_pro
return profile;
}
+ else
+ return 0;
+}
-diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
-index 25385aa09ed5d..7c163aa7e8bd2 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -2544,6 +2544,8 @@ struct dc_power_profile {
/* DSC Interfaces */
#include "dc_dsc.h"
-diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
-index 8597e866bfe6b..3061dca47dd2f 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
-@@ -219,6 +219,7 @@ struct resource_funcs {
- * Get indicator of power from a context that went through full validation
- */
- int (*get_power_profile)(const struct dc_state *context);
+@@ -215,6 +215,7 @@ struct resource_funcs {
+
+ void (*get_panel_config_defaults)(struct dc_panel_config *panel_config);
+ void (*build_pipe_pix_clk_params)(struct pipe_ctx *pipe_ctx);
+ unsigned int (*get_det_buffer_size)(const struct dc_state *context);
};
struct audio_support{
-diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
-index ac8cb20e2e3b6..80386f698ae4d 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
-@@ -1721,6 +1721,12 @@ int dcn31_populate_dml_pipes_from_context(
+@@ -1721,6 +1721,12 @@ int dcn31_populate_dml_pipes_from_contex
return pipe_cnt;
}
void dcn31_calculate_wm_and_dlg(
struct dc *dc, struct dc_state *context,
display_e2e_pipe_params_st *pipes,
-@@ -1843,6 +1849,7 @@ static struct resource_funcs dcn31_res_pool_funcs = {
+@@ -1843,6 +1849,7 @@ static struct resource_funcs dcn31_res_p
.update_bw_bounding_box = dcn31_update_bw_bounding_box,
.patch_unknown_plane_state = dcn20_patch_unknown_plane_state,
.get_panel_config_defaults = dcn31_get_panel_config_defaults,
};
static struct clock_source *dcn30_clock_source_create(
-diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.h b/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.h
-index 901436591ed45..551ad912f7bea 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.h
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.h
-@@ -63,6 +63,9 @@ struct resource_pool *dcn31_create_resource_pool(
+@@ -63,6 +63,9 @@ struct resource_pool *dcn31_create_resou
const struct dc_init_data *init_data,
struct dc *dc);
/*temp: B0 specific before switch to dcn313 headers*/
#ifndef regPHYPLLF_PIXCLK_RESYNC_CNTL
#define regPHYPLLF_PIXCLK_RESYNC_CNTL 0x007e
-diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c
-index 169924d0a8393..01d95108ce662 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c
-@@ -1778,6 +1778,7 @@ static struct resource_funcs dcn314_res_pool_funcs = {
+@@ -1778,6 +1778,7 @@ static struct resource_funcs dcn314_res_
.patch_unknown_plane_state = dcn20_patch_unknown_plane_state,
.get_panel_config_defaults = dcn314_get_panel_config_defaults,
.get_preferred_eng_id_dpia = dcn314_get_preferred_eng_id_dpia,
};
static struct clock_source *dcn30_clock_source_create(
-diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
-index f6b840f046a5d..d85356b7fe419 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
-@@ -1846,6 +1846,7 @@ static struct resource_funcs dcn315_res_pool_funcs = {
+@@ -1840,6 +1840,7 @@ static struct resource_funcs dcn315_res_
+ .update_bw_bounding_box = dcn315_update_bw_bounding_box,
.patch_unknown_plane_state = dcn20_patch_unknown_plane_state,
.get_panel_config_defaults = dcn315_get_panel_config_defaults,
- .get_power_profile = dcn315_get_power_profile,
+ .get_det_buffer_size = dcn31_get_det_buffer_size,
};
static bool dcn315_resource_construct(
-diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c
-index 5fd52c5fcee45..af82e13029c9e 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c
-@@ -1720,6 +1720,7 @@ static struct resource_funcs dcn316_res_pool_funcs = {
+@@ -1720,6 +1720,7 @@ static struct resource_funcs dcn316_res_
.update_bw_bounding_box = dcn316_update_bw_bounding_box,
.patch_unknown_plane_state = dcn20_patch_unknown_plane_state,
.get_panel_config_defaults = dcn316_get_panel_config_defaults,
};
static bool dcn316_resource_construct(
-diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
-index ed3238edaf791..d0c4693c12241 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
-@@ -1779,6 +1779,7 @@ static struct resource_funcs dcn35_res_pool_funcs = {
+@@ -1779,6 +1779,7 @@ static struct resource_funcs dcn35_res_p
.patch_unknown_plane_state = dcn20_patch_unknown_plane_state,
.get_panel_config_defaults = dcn35_get_panel_config_defaults,
.get_preferred_eng_id_dpia = dcn35_get_preferred_eng_id_dpia,
};
static bool dcn35_resource_construct(
-diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
-index c274861e83c73..575c0aa12229c 100644
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
-@@ -1758,6 +1758,7 @@ static struct resource_funcs dcn351_res_pool_funcs = {
+@@ -1758,6 +1758,7 @@ static struct resource_funcs dcn351_res_
.patch_unknown_plane_state = dcn20_patch_unknown_plane_state,
.get_panel_config_defaults = dcn35_get_panel_config_defaults,
.get_preferred_eng_id_dpia = dcn351_get_preferred_eng_id_dpia,
};
static bool dcn351_resource_construct(
---
-2.43.0
-
+++ /dev/null
-From 10d5cb645fd0f484fe66b807af6f0a5bf312a5f0 Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Tue, 10 Sep 2024 16:41:20 -0400
-Subject: drm/amd/display: Update Interface to Check UCLK DPM
-
-From: Austin Zheng <Austin.Zheng@amd.com>
-
-[ Upstream commit b8d046985c2dc41a0e264a391da4606099f8d44f ]
-
-[Why]
-Videos using YUV420 format may result in high power being used.
-Disabling MPO may result in lower power usage.
-Update interface that can be used to check power profile of a dc_state.
-
-[How]
-Allow pstate switching in VBlank as last entry in strategy candidates.
-Add helper functions that can be used to determine power level:
--get power profile after a dc_state has undergone full validation
-
-Reviewed-by: Aric Cyr <aric.cyr@amd.com>
-Signed-off-by: Austin Zheng <Austin.Zheng@amd.com>
-Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
-Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
-Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-Stable-dep-of: 6a7fd76b949e ("drm/amd/display: Add option to retrieve detile buffer size")
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- drivers/gpu/drm/amd/display/dc/core/dc.c | 9 ++++++++-
- .../dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c | 1 +
- drivers/gpu/drm/amd/display/dc/inc/core_types.h | 4 ++++
- .../dc/resource/dcn315/dcn315_resource.c | 6 ++++++
- .../dc/resource/dcn401/dcn401_resource.c | 17 +++++++++++++++++
- 5 files changed, 36 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
-index a6911bb2cf0c6..1d99ab233765f 100644
---- a/drivers/gpu/drm/amd/display/dc/core/dc.c
-+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
-@@ -6001,8 +6001,15 @@ void dc_set_edp_power(const struct dc *dc, struct dc_link *edp_link,
- struct dc_power_profile dc_get_power_profile_for_dc_state(const struct dc_state *context)
- {
- struct dc_power_profile profile = { 0 };
-+ struct dc *dc = NULL;
-
-- profile.power_level += !context->bw_ctx.bw.dcn.clk.p_state_change_support;
-+ if (!context || !context->clk_mgr || !context->clk_mgr->ctx || !context->clk_mgr->ctx->dc)
-+ return profile;
-+
-+ dc = context->clk_mgr->ctx->dc;
-+
-+ if (dc->res_pool->funcs->get_power_profile)
-+ profile.power_level = dc->res_pool->funcs->get_power_profile(context);
-
- return profile;
- }
-diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c
-index dd9971867f749..720ecede3a4c0 100644
---- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c
-+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c
-@@ -1799,6 +1799,7 @@ bool pmo_dcn4_fams2_init_for_pstate_support(struct dml2_pmo_init_for_pstate_supp
- }
-
- if (s->pmo_dcn4.num_pstate_candidates > 0) {
-+ s->pmo_dcn4.pstate_strategy_candidates[s->pmo_dcn4.num_pstate_candidates-1].allow_state_increase = true;
- s->pmo_dcn4.cur_pstate_candidate = -1;
- return true;
- } else {
-diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
-index bfb8b8502d202..8597e866bfe6b 100644
---- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h
-+++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
-@@ -215,6 +215,10 @@ struct resource_funcs {
-
- void (*get_panel_config_defaults)(struct dc_panel_config *panel_config);
- void (*build_pipe_pix_clk_params)(struct pipe_ctx *pipe_ctx);
-+ /*
-+ * Get indicator of power from a context that went through full validation
-+ */
-+ int (*get_power_profile)(const struct dc_state *context);
- };
-
- struct audio_support{
-diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
-index 3f4b9dba41124..f6b840f046a5d 100644
---- a/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
-+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
-@@ -1812,6 +1812,11 @@ static void dcn315_get_panel_config_defaults(struct dc_panel_config *panel_confi
- *panel_config = panel_config_defaults;
- }
-
-+static int dcn315_get_power_profile(const struct dc_state *context)
-+{
-+ return !context->bw_ctx.bw.dcn.clk.p_state_change_support;
-+}
-+
- static struct dc_cap_funcs cap_funcs = {
- .get_dcc_compression_cap = dcn20_get_dcc_compression_cap
- };
-@@ -1840,6 +1845,7 @@ static struct resource_funcs dcn315_res_pool_funcs = {
- .update_bw_bounding_box = dcn315_update_bw_bounding_box,
- .patch_unknown_plane_state = dcn20_patch_unknown_plane_state,
- .get_panel_config_defaults = dcn315_get_panel_config_defaults,
-+ .get_power_profile = dcn315_get_power_profile,
- };
-
- static bool dcn315_resource_construct(
-diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
-index 4aa975418fb18..6bcc6c400b386 100644
---- a/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
-+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
-@@ -1688,6 +1688,22 @@ static void dcn401_build_pipe_pix_clk_params(struct pipe_ctx *pipe_ctx)
- }
- }
-
-+static int dcn401_get_power_profile(const struct dc_state *context)
-+{
-+ int uclk_mhz = context->bw_ctx.bw.dcn.clk.dramclk_khz / 1000;
-+ int dpm_level = 0;
-+
-+ for (int i = 0; i < context->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_memclk_levels; i++) {
-+ if (context->clk_mgr->bw_params->clk_table.entries[i].memclk_mhz == 0 ||
-+ uclk_mhz < context->clk_mgr->bw_params->clk_table.entries[i].memclk_mhz)
-+ break;
-+ if (uclk_mhz > context->clk_mgr->bw_params->clk_table.entries[i].memclk_mhz)
-+ dpm_level++;
-+ }
-+
-+ return dpm_level;
-+}
-+
- static struct resource_funcs dcn401_res_pool_funcs = {
- .destroy = dcn401_destroy_resource_pool,
- .link_enc_create = dcn401_link_encoder_create,
-@@ -1714,6 +1730,7 @@ static struct resource_funcs dcn401_res_pool_funcs = {
- .prepare_mcache_programming = dcn401_prepare_mcache_programming,
- .build_pipe_pix_clk_params = dcn401_build_pipe_pix_clk_params,
- .calculate_mall_ways_from_bytes = dcn32_calculate_mall_ways_from_bytes,
-+ .get_power_profile = dcn401_get_power_profile,
- };
-
- static uint32_t read_pipe_fuses(struct dc_context *ctx)
---
-2.43.0
-