drm/amd/display: Add null checker before access structs

Checks null pointer before accessing various structs.

This fixes 5 NULL_RETURNS issues reported by Coverity.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_utils.c b/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_utils.c
index 4166332b5b89911097c72769561de4478324d92f..b97d9abfdbc68c9ddbb15ee62e62d5295ce8c37a 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_utils.c
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_utils.c
@@ -360,6 +360,8 @@ static struct dc_plane_state *dml21_add_phantom_plane(struct dml2_context *dml_c
        struct dc_plane_state *phantom_plane;
 
        phantom_plane = dml_ctx->config.svp_pstate.callbacks.create_phantom_plane(dc, context, main_plane);
+       if (!phantom_plane)
+               return NULL;
 
        phantom_plane->format = main_plane->format;
        phantom_plane->rotation = main_plane->rotation;

diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c
index 7272a04b9d1ddb922f644833eba4042cd04f98ce..00fedc00a73558e60834870f33d6bcf6d4da2f3d 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c
+++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c
@@ -1082,12 +1082,17 @@ static bool is_timing_group_schedulable(
 
        /* init allow start and end lines for timing group */
        stream_method_fams2_meta = get_per_method_common_meta(pmo, per_stream_pstate_strategy[base_stream_idx], base_stream_idx);
+       if (!stream_method_fams2_meta)
+               return false;
+
        group_fams2_meta->allow_start_otg_vline = stream_method_fams2_meta->allow_start_otg_vline;
        group_fams2_meta->allow_end_otg_vline = stream_method_fams2_meta->allow_end_otg_vline;
        group_fams2_meta->period_us = stream_method_fams2_meta->period_us;
        for (i = base_stream_idx + 1; i < display_cfg->display_config.num_streams; i++) {
                if (is_bit_set_in_bitfield(pmo->scratch.pmo_dcn4.synchronized_timing_group_masks[timing_group_idx], i)) {
                        stream_method_fams2_meta = get_per_method_common_meta(pmo, per_stream_pstate_strategy[i], i);
+                       if (!stream_method_fams2_meta)
+                               continue;
 
                        if (group_fams2_meta->allow_start_otg_vline < stream_method_fams2_meta->allow_start_otg_vline) {
                                /* set group allow start to larger otg vline */

diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
index f93853d434d20d4640b2575061cb52357f2c1972..e783afbbb397b29d3404d6116961ca8d1e23da1c 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
@@ -2628,7 +2628,7 @@ static bool dcn20_resource_construct(
                ranges.writer_wm_sets[0].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX;
 
                /* Notify PP Lib/SMU which Watermarks to use for which clock ranges */
-               if (pool->base.pp_smu->nv_funcs.set_wm_ranges)
+               if (pool->base.pp_smu && pool->base.pp_smu->nv_funcs.set_wm_ranges)
                        pool->base.pp_smu->nv_funcs.set_wm_ranges(&pool->base.pp_smu->nv_funcs.pp_smu, &ranges);
        }
 

diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c
index 070a4efb308bdf159b22c29ff07f9e839c6779a2..131d98025bd47501f165a6a270a58385306e7902 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c
@@ -795,11 +795,13 @@ static struct link_encoder *dcn201_link_encoder_create(
 {
        struct dcn20_link_encoder *enc20 =
                kzalloc(sizeof(struct dcn20_link_encoder), GFP_ATOMIC);
-       struct dcn10_link_encoder *enc10 = &enc20->enc10;
+       struct dcn10_link_encoder *enc10;
 
        if (!enc20)
                return NULL;
 
+       enc10 = &enc20->enc10;
+
        dcn201_link_encoder_construct(enc20,
                        enc_init_data,
                        &link_enc_feature,