]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
bnxt_en: Refactor completion ring allocation logic for P5_PLUS chips
authorMichael Chan <michael.chan@broadcom.com>
Thu, 13 Feb 2025 01:12:30 +0000 (17:12 -0800)
committerJakub Kicinski <kuba@kernel.org>
Sat, 15 Feb 2025 03:50:22 +0000 (19:50 -0800)
Add a new bnxt_hwrm_cp_ring_alloc_p5() function to handle allocating
one completion ring on P5_PLUS chips.  This simplifies the existing code
and will be useful later in the series.

Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Michal Swiatkowski <michal.swiatkowski@linux.intel.com>
Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Link: https://patch.msgid.link/20250213011240.1640031-3-michael.chan@broadcom.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
drivers/net/ethernet/broadcom/bnxt/bnxt.c

index fc870c104c560059dfa8e8da9a87da29675bf5c0..0e16ea823fbdb7e458b7d2a1671f74a1c9c242c2 100644 (file)
@@ -7199,6 +7199,25 @@ static int bnxt_hwrm_rx_agg_ring_alloc(struct bnxt *bp,
        return 0;
 }
 
+static int bnxt_hwrm_cp_ring_alloc_p5(struct bnxt *bp,
+                                     struct bnxt_cp_ring_info *cpr)
+{
+       const u32 type = HWRM_RING_ALLOC_CMPL;
+       struct bnxt_napi *bnapi = cpr->bnapi;
+       struct bnxt_ring_struct *ring;
+       u32 map_idx = bnapi->index;
+       int rc;
+
+       ring = &cpr->cp_ring_struct;
+       ring->handle = BNXT_SET_NQ_HDL(cpr);
+       rc = hwrm_ring_alloc_send_msg(bp, ring, type, map_idx);
+       if (rc)
+               return rc;
+       bnxt_set_db(bp, &cpr->cp_db, type, map_idx, ring->fw_ring_id);
+       bnxt_db_cq(bp, &cpr->cp_db, cpr->cp_raw_cons);
+       return 0;
+}
+
 static int bnxt_hwrm_ring_alloc(struct bnxt *bp)
 {
        bool agg_rings = !!(bp->flags & BNXT_FLAG_AGG_RINGS);
@@ -7242,19 +7261,9 @@ static int bnxt_hwrm_ring_alloc(struct bnxt *bp)
                u32 map_idx;
 
                if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {
-                       struct bnxt_cp_ring_info *cpr2 = txr->tx_cpr;
-                       struct bnxt_napi *bnapi = txr->bnapi;
-                       u32 type2 = HWRM_RING_ALLOC_CMPL;
-
-                       ring = &cpr2->cp_ring_struct;
-                       ring->handle = BNXT_SET_NQ_HDL(cpr2);
-                       map_idx = bnapi->index;
-                       rc = hwrm_ring_alloc_send_msg(bp, ring, type2, map_idx);
+                       rc = bnxt_hwrm_cp_ring_alloc_p5(bp, txr->tx_cpr);
                        if (rc)
                                goto err_out;
-                       bnxt_set_db(bp, &cpr2->cp_db, type2, map_idx,
-                                   ring->fw_ring_id);
-                       bnxt_db_cq(bp, &cpr2->cp_db, cpr2->cp_raw_cons);
                }
                ring = &txr->tx_ring_struct;
                map_idx = i;
@@ -7274,20 +7283,9 @@ static int bnxt_hwrm_ring_alloc(struct bnxt *bp)
                if (!agg_rings)
                        bnxt_db_write(bp, &rxr->rx_db, rxr->rx_prod);
                if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {
-                       struct bnxt_cp_ring_info *cpr2 = rxr->rx_cpr;
-                       struct bnxt_napi *bnapi = rxr->bnapi;
-                       u32 type2 = HWRM_RING_ALLOC_CMPL;
-                       struct bnxt_ring_struct *ring;
-                       u32 map_idx = bnapi->index;
-
-                       ring = &cpr2->cp_ring_struct;
-                       ring->handle = BNXT_SET_NQ_HDL(cpr2);
-                       rc = hwrm_ring_alloc_send_msg(bp, ring, type2, map_idx);
+                       rc = bnxt_hwrm_cp_ring_alloc_p5(bp, rxr->rx_cpr);
                        if (rc)
                                goto err_out;
-                       bnxt_set_db(bp, &cpr2->cp_db, type2, map_idx,
-                                   ring->fw_ring_id);
-                       bnxt_db_cq(bp, &cpr2->cp_db, cpr2->cp_raw_cons);
                }
        }