RISC-V: Update Zba 'shNadd.uw' testcase.`

This patch update RISC-V Zba extension 'shNadd.uw' instruction generation.
Supplemented the instruction generation detection of 'sh1add.uw' and
'sh3add.uw'.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/zba-shadd.c: New test functions.

diff --git a/gcc/testsuite/gcc.target/riscv/zba-shadd.c b/gcc/testsuite/gcc.target/riscv/zba-shadd.c
index 61305d3a357d8e9caf7531ddd949e626b235d48e..445ffb294741f0e728b535cce4f034e0e057710b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/zba-shadd.c
+++ b/gcc/testsuite/gcc.target/riscv/zba-shadd.c
@@ -1,7 +1,15 @@
 /* { dg-do compile } */
 /* { dg-options "-O2 -march=rv64gc_zba -mabi=lp64" } */
 
-unsigned long foo(unsigned int a, unsigned long b)
+unsigned long foo1(unsigned int a, unsigned long b)
+{
+        a = a << 1;
+        unsigned long c = (unsigned long) a;
+        unsigned long d = b + (c<<1);
+        return d;
+}
+
+unsigned long foo2(unsigned int a, unsigned long b)
 {
         a = a << 1;
         unsigned long c = (unsigned long) a;
@@ -9,5 +17,15 @@ unsigned long foo(unsigned int a, unsigned long b)
         return d;
 }
 
+unsigned long foo3(unsigned int a, unsigned long b)
+{
+        a = a << 1;
+        unsigned long c = (unsigned long) a;
+        unsigned long d = b + (c<<3);
+        return d;
+}
+
+/* { dg-final { scan-assembler "sh1add.uw" } } */
 /* { dg-final { scan-assembler "sh2add.uw" } } */
+/* { dg-final { scan-assembler "sh3add.uw" } } */
 /* { dg-final { scan-assembler-not {\mzext} } } */