]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/commitdiff
5.4-stable patches
authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 31 Dec 2019 17:12:28 +0000 (18:12 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 31 Dec 2019 17:12:28 +0000 (18:12 +0100)
added patches:
revert-mips-futex-emit-loongson3-sync-workarounds-within-asm.patch
revert-mips-futex-restore-n-after-sync-instructions.patch

queue-5.4/revert-mips-futex-emit-loongson3-sync-workarounds-within-asm.patch [new file with mode: 0644]
queue-5.4/revert-mips-futex-restore-n-after-sync-instructions.patch [new file with mode: 0644]
queue-5.4/series [new file with mode: 0644]

diff --git a/queue-5.4/revert-mips-futex-emit-loongson3-sync-workarounds-within-asm.patch b/queue-5.4/revert-mips-futex-emit-loongson3-sync-workarounds-within-asm.patch
new file mode 100644 (file)
index 0000000..4289093
--- /dev/null
@@ -0,0 +1,131 @@
+From 91e92a656019b3026c7c53d14494f217234012b9 Mon Sep 17 00:00:00 2001
+From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Date: Tue, 31 Dec 2019 18:08:46 +0100
+Subject: Revert "MIPS: futex: Emit Loongson3 sync workarounds within asm"
+
+From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+This reverts commit d754a529a8be55f009c6679d772c472c1632cd5b which was
+commit 3c1d3f0979721a39dd2980c97466127ce65aa130 upstream.
+
+This breaks the build and should be reverted.
+
+Cc: Guenter Roeck <linux@roeck-us.net>
+Cc: Paul Burton <paul.burton@mips.com>
+Cc: linux-mips@vger.kernel.org
+Cc: Huacai Chen <chenhc@lemote.com>
+Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
+Cc: linux-kernel@vger.kernel.org
+Cc: Sasha Levin <sashal@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/mips/include/asm/barrier.h |   13 ++++++-------
+ arch/mips/include/asm/futex.h   |   15 ++++++++-------
+ 2 files changed, 14 insertions(+), 14 deletions(-)
+
+--- a/arch/mips/include/asm/barrier.h
++++ b/arch/mips/include/asm/barrier.h
+@@ -218,14 +218,13 @@
+  * ordering will be done by smp_llsc_mb() and friends.
+  */
+ #if defined(CONFIG_WEAK_REORDERING_BEYOND_LLSC) && defined(CONFIG_SMP)
+-# define __WEAK_LLSC_MB               sync
+-# define smp_llsc_mb() \
+-      __asm__ __volatile__(__stringify(__WEAK_LLSC_MB) : : :"memory")
+-# define __LLSC_CLOBBER
++#define __WEAK_LLSC_MB                "       sync    \n"
++#define smp_llsc_mb()         __asm__ __volatile__(__WEAK_LLSC_MB : : :"memory")
++#define __LLSC_CLOBBER
+ #else
+-# define __WEAK_LLSC_MB
+-# define smp_llsc_mb()                do { } while (0)
+-# define __LLSC_CLOBBER               "memory"
++#define __WEAK_LLSC_MB                "               \n"
++#define smp_llsc_mb()         do { } while (0)
++#define __LLSC_CLOBBER                "memory"
+ #endif
+ #ifdef CONFIG_CPU_CAVIUM_OCTEON
+--- a/arch/mips/include/asm/futex.h
++++ b/arch/mips/include/asm/futex.h
+@@ -16,7 +16,6 @@
+ #include <asm/barrier.h>
+ #include <asm/compiler.h>
+ #include <asm/errno.h>
+-#include <asm/sync.h>
+ #include <asm/war.h>
+ #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg)            \
+@@ -33,7 +32,7 @@
+               "       .set    arch=r4000                      \n"     \
+               "2:     sc      $1, %2                          \n"     \
+               "       beqzl   $1, 1b                          \n"     \
+-              __stringify(__WEAK_LLSC_MB)                             \
++              __WEAK_LLSC_MB                                          \
+               "3:                                             \n"     \
+               "       .insn                                   \n"     \
+               "       .set    pop                             \n"     \
+@@ -51,19 +50,19 @@
+                 "i" (-EFAULT)                                         \
+               : "memory");                                            \
+       } else if (cpu_has_llsc) {                                      \
++              loongson_llsc_mb();                                     \
+               __asm__ __volatile__(                                   \
+               "       .set    push                            \n"     \
+               "       .set    noat                            \n"     \
+               "       .set    push                            \n"     \
+               "       .set    "MIPS_ISA_ARCH_LEVEL"           \n"     \
+-              "       " __SYNC(full, loongson3_war) "         \n"     \
+               "1:     "user_ll("%1", "%4")" # __futex_atomic_op\n"    \
+               "       .set    pop                             \n"     \
+               "       " insn  "                               \n"     \
+               "       .set    "MIPS_ISA_ARCH_LEVEL"           \n"     \
+               "2:     "user_sc("$1", "%2")"                   \n"     \
+               "       beqz    $1, 1b                          \n"     \
+-              __stringify(__WEAK_LLSC_MB)                             \
++              __WEAK_LLSC_MB                                          \
+               "3:                                             \n"     \
+               "       .insn                                   \n"     \
+               "       .set    pop                             \n"     \
+@@ -148,7 +147,7 @@ futex_atomic_cmpxchg_inatomic(u32 *uval,
+               "       .set    arch=r4000                              \n"
+               "2:     sc      $1, %2                                  \n"
+               "       beqzl   $1, 1b                                  \n"
+-              __stringify(__WEAK_LLSC_MB)
++              __WEAK_LLSC_MB
+               "3:                                                     \n"
+               "       .insn                                           \n"
+               "       .set    pop                                     \n"
+@@ -165,13 +164,13 @@ futex_atomic_cmpxchg_inatomic(u32 *uval,
+                 "i" (-EFAULT)
+               : "memory");
+       } else if (cpu_has_llsc) {
++              loongson_llsc_mb();
+               __asm__ __volatile__(
+               "# futex_atomic_cmpxchg_inatomic                        \n"
+               "       .set    push                                    \n"
+               "       .set    noat                                    \n"
+               "       .set    push                                    \n"
+               "       .set    "MIPS_ISA_ARCH_LEVEL"                   \n"
+-              "       " __SYNC(full, loongson3_war) "                 \n"
+               "1:     "user_ll("%1", "%3")"                           \n"
+               "       bne     %1, %z4, 3f                             \n"
+               "       .set    pop                                     \n"
+@@ -179,7 +178,8 @@ futex_atomic_cmpxchg_inatomic(u32 *uval,
+               "       .set    "MIPS_ISA_ARCH_LEVEL"                   \n"
+               "2:     "user_sc("$1", "%2")"                           \n"
+               "       beqz    $1, 1b                                  \n"
+-              "3:     " __SYNC_ELSE(full, loongson3_war, __WEAK_LLSC_MB) "\n"
++              __WEAK_LLSC_MB
++              "3:                                                     \n"
+               "       .insn                                           \n"
+               "       .set    pop                                     \n"
+               "       .section .fixup,\"ax\"                          \n"
+@@ -194,6 +194,7 @@ futex_atomic_cmpxchg_inatomic(u32 *uval,
+               : GCC_OFF_SMALL_ASM() (*uaddr), "Jr" (oldval), "Jr" (newval),
+                 "i" (-EFAULT)
+               : "memory");
++              loongson_llsc_mb();
+       } else
+               return -ENOSYS;
diff --git a/queue-5.4/revert-mips-futex-restore-n-after-sync-instructions.patch b/queue-5.4/revert-mips-futex-restore-n-after-sync-instructions.patch
new file mode 100644 (file)
index 0000000..5549d59
--- /dev/null
@@ -0,0 +1,50 @@
+From 9019bd4dbad293ddfa46816b58de550f466f4339 Mon Sep 17 00:00:00 2001
+From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Date: Tue, 31 Dec 2019 18:04:17 +0100
+Subject: Revert "MIPS: futex: Restore \n after sync instructions"
+
+From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+This reverts commit dc9d0a75ce9af74612d6a4d052e4df2bddfe8ed4 which is
+commit fd7710cb491f900eb63d2ce5aac0e682003e84e9 upstream.
+
+This, and the follow-on patch, breaks the mips build so it needs to be
+reverted.
+
+Reported-by: Guenter Roeck <linux@roeck-us.net>
+Cc: Paul Burton <paul.burton@mips.com>
+Cc: Sasha Levin <sashal@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/mips/include/asm/futex.h |    6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/arch/mips/include/asm/futex.h
++++ b/arch/mips/include/asm/futex.h
+@@ -33,7 +33,7 @@
+               "       .set    arch=r4000                      \n"     \
+               "2:     sc      $1, %2                          \n"     \
+               "       beqzl   $1, 1b                          \n"     \
+-              __stringify(__WEAK_LLSC_MB) "                   \n"     \
++              __stringify(__WEAK_LLSC_MB)                             \
+               "3:                                             \n"     \
+               "       .insn                                   \n"     \
+               "       .set    pop                             \n"     \
+@@ -63,7 +63,7 @@
+               "       .set    "MIPS_ISA_ARCH_LEVEL"           \n"     \
+               "2:     "user_sc("$1", "%2")"                   \n"     \
+               "       beqz    $1, 1b                          \n"     \
+-              __stringify(__WEAK_LLSC_MB) "                   \n"     \
++              __stringify(__WEAK_LLSC_MB)                             \
+               "3:                                             \n"     \
+               "       .insn                                   \n"     \
+               "       .set    pop                             \n"     \
+@@ -148,7 +148,7 @@ futex_atomic_cmpxchg_inatomic(u32 *uval,
+               "       .set    arch=r4000                              \n"
+               "2:     sc      $1, %2                                  \n"
+               "       beqzl   $1, 1b                                  \n"
+-              __stringify(__WEAK_LLSC_MB) "                           \n"
++              __stringify(__WEAK_LLSC_MB)
+               "3:                                                     \n"
+               "       .insn                                           \n"
+               "       .set    pop                                     \n"
diff --git a/queue-5.4/series b/queue-5.4/series
new file mode 100644 (file)
index 0000000..3a63ecd
--- /dev/null
@@ -0,0 +1,2 @@
+revert-mips-futex-restore-n-after-sync-instructions.patch
+revert-mips-futex-emit-loongson3-sync-workarounds-within-asm.patch