i386: Fix *udivmodsi4_pow2_zext_? patterns

In addition to the obvious cut-n-pasto where *udivmodsi4_pow2_zext_2
never matches, limit the range of the immediate operand to prevent
out of range immediate operand of AND instruction.

Found by inspection, the patterns rarely match (if at all), since
tree optimizers do the transformation before RTL is generated. But
according to the comment above *udivmod<mode>4_pow2, the constant can
materialize after expansion, so leave these patterns around for now.

2021-07-09  Uroš Bizjak  <ubizjak@gmail.com>

gcc/
	* config/i386/i386.md (*udivmodsi4_pow2_zext_1): Limit the
	log2 range of operands[3] to [1,31].
	(*udivmodsi4_pow2_zext_2): Ditto.  Correct insn RTX pattern.

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 156c6a94989af78122738576ebe95b59693fbdf2..26fb81b9b4bdb8b0d76adc60ad7ee158cd03b16d 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -8518,7 +8518,7 @@
        (umod:SI (match_dup 2) (match_dup 3)))
    (clobber (reg:CC FLAGS_REG))]
   "TARGET_64BIT
-   && exact_log2 (UINTVAL (operands[3])) > 0"
+   && IN_RANGE (exact_log2 (UINTVAL (operands[3])), 1, 31)"
   "#"
   "&& reload_completed"
   [(set (match_dup 1) (match_dup 2))
@@ -8599,10 +8599,10 @@
          (umod:SI (match_operand:SI 2 "register_operand" "0")
                   (match_operand:SI 3 "const_int_operand" "n"))))
    (set (match_operand:SI 0 "register_operand" "=r")
-       (umod:SI (match_dup 2) (match_dup 3)))
+       (udiv:SI (match_dup 2) (match_dup 3)))
    (clobber (reg:CC FLAGS_REG))]
   "TARGET_64BIT
-   && exact_log2 (UINTVAL (operands[3])) > 0"
+   && IN_RANGE (exact_log2 (UINTVAL (operands[3])), 1, 31)"
   "#"
   "&& reload_completed"
   [(set (match_dup 1) (match_dup 2))