]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
riscv: dts: sophgo: switch precise compatible for existed clock device for CV18XX
authorInochi Amaoto <inochiama@gmail.com>
Sun, 4 May 2025 10:45:52 +0000 (18:45 +0800)
committerInochi Amaoto <inochiama@gmail.com>
Sun, 18 May 2025 22:23:26 +0000 (06:23 +0800)
replace newly added precise compatible with old one for existed
clock device of CV18XX series SoCs.

Reviewed-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Link: https://lore.kernel.org/r/20250504104553.1447819-4-inochiama@gmail.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
arch/riscv/boot/dts/sophgo/cv1800b.dtsi
arch/riscv/boot/dts/sophgo/cv1812h.dtsi
arch/riscv/boot/dts/sophgo/sg2002.dtsi

index 88707cc13fb4dbaf81b68a659cd20d1822a02f91..90de978f69c1923158ebd93c47030c846b80be63 100644 (file)
@@ -29,7 +29,7 @@
                };
 
                clk: clock-controller@3002000 {
-                       compatible = "sophgo,cv1800-clk";
+                       compatible = "sophgo,cv1800b-clk";
                        reg = <0x03002000 0x1000>;
                        clocks = <&osc>;
                        #clock-cells = <1>;
index 0974955e4e0537196c9a4dc1cc52c2eff61563a0..9a2a314d3347f63ed2a1d9031e79931b3cee35ae 100644 (file)
@@ -31,7 +31,7 @@
                };
 
                clk: clock-controller@3002000 {
-                       compatible = "sophgo,cv1810-clk";
+                       compatible = "sophgo,cv1812h-clk";
                        reg = <0x03002000 0x1000>;
                        clocks = <&osc>;
                        #clock-cells = <1>;
index 6f09c91991024625cf6a26796b4ef1b3b4364a7b..98001cce238e8d6c7d4774d2e440d0b1b260b015 100644 (file)
@@ -31,7 +31,7 @@
                };
 
                clk: clock-controller@3002000 {
-                       compatible = "sophgo,sg2000-clk";
+                       compatible = "sophgo,sg2002-clk", "sophgo,sg2000-clk";
                        reg = <0x03002000 0x1000>;
                        clocks = <&osc>;
                        #clock-cells = <1>;