]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
iio: adc: ad4695: add custom regmap bus callbacks
authorTrevor Gamblin <tgamblin@baylibre.com>
Wed, 13 Nov 2024 20:53:00 +0000 (15:53 -0500)
committerJonathan Cameron <Jonathan.Cameron@huawei.com>
Mon, 3 Feb 2025 19:15:38 +0000 (19:15 +0000)
Add a custom implementation of regmap read/write callbacks using the SPI
bus. This allows them to be performed at a lower SCLK rate than data
reads. Previously, all SPI transfers were being performed at a lower
speed, but with this change sample data is read at the max bus speed
while the register reads/writes remain at the lower rate.

Also remove .can_multi_write from the AD4695 driver's regmap_configs, as
this isn't implemented or needed.

For some background context, see:

https://lore.kernel.org/linux-iio/20241028163907.00007e12@Huawei.com/

Suggested-by: David Lechner <dlechner@baylibre.com>
Signed-off-by: Trevor Gamblin <tgamblin@baylibre.com>
Reviewed-by: David Lechner <dlechner@baylibre.com>
Tested-by: David Lechner <dlechner@baylibre.com>
Link: https://patch.msgid.link/20241113-tgamblin-ad4695_improvements-v2-3-b6bb7c758fc4@baylibre.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
drivers/iio/adc/Kconfig
drivers/iio/adc/ad4695.c

index 849c90203071a77ec7d94cec06d4378ece44440b..a3e8ac569ce4c6b6b30b48acb265d530aa98e89c 100644 (file)
@@ -51,9 +51,9 @@ config AD4130
 config AD4695
        tristate "Analog Device AD4695 ADC Driver"
        depends on SPI
-       select REGMAP_SPI
        select IIO_BUFFER
        select IIO_TRIGGERED_BUFFER
+       select REGMAP
        help
          Say yes here to build support for Analog Devices AD4695 and similar
          analog to digital converters (ADC).
index 22fdc454b0ceab1a17e0f8fd96c265d8743ed683..13cf01d35301be40369571e7dd2aeac1a8148d15 100644 (file)
@@ -150,6 +150,8 @@ struct ad4695_state {
        /* Commands to send for single conversion. */
        u16 cnv_cmd;
        u8 cnv_cmd2;
+       /* Buffer for storing data from regmap bus reads/writes */
+       u8 regmap_bus_data[4];
 };
 
 static const struct regmap_range ad4695_regmap_rd_ranges[] = {
@@ -194,7 +196,6 @@ static const struct regmap_config ad4695_regmap_config = {
        .max_register = AD4695_REG_AS_SLOT(127),
        .rd_table = &ad4695_regmap_rd_table,
        .wr_table = &ad4695_regmap_wr_table,
-       .can_multi_write = true,
 };
 
 static const struct regmap_range ad4695_regmap16_rd_ranges[] = {
@@ -226,7 +227,67 @@ static const struct regmap_config ad4695_regmap16_config = {
        .max_register = AD4695_REG_GAIN_IN(15),
        .rd_table = &ad4695_regmap16_rd_table,
        .wr_table = &ad4695_regmap16_wr_table,
-       .can_multi_write = true,
+};
+
+static int ad4695_regmap_bus_reg_write(void *context, const void *data,
+                                      size_t count)
+{
+       struct ad4695_state *st = context;
+       struct spi_transfer xfer = {
+                       .speed_hz = AD4695_REG_ACCESS_SCLK_HZ,
+                       .len = count,
+                       .tx_buf = st->regmap_bus_data,
+       };
+
+       if (count > ARRAY_SIZE(st->regmap_bus_data))
+               return -EINVAL;
+
+       memcpy(st->regmap_bus_data, data, count);
+
+       return spi_sync_transfer(st->spi, &xfer, 1);
+}
+
+static int ad4695_regmap_bus_reg_read(void *context, const void *reg,
+                                     size_t reg_size, void *val,
+                                     size_t val_size)
+{
+       struct ad4695_state *st = context;
+       struct spi_transfer xfers[] = {
+               {
+                       .speed_hz = AD4695_REG_ACCESS_SCLK_HZ,
+                       .len = reg_size,
+                       .tx_buf = &st->regmap_bus_data[0],
+               }, {
+                       .speed_hz = AD4695_REG_ACCESS_SCLK_HZ,
+                       .len = val_size,
+                       .rx_buf = &st->regmap_bus_data[2],
+               },
+       };
+       int ret;
+
+       if (reg_size > 2)
+               return -EINVAL;
+
+       if (val_size > 2)
+               return -EINVAL;
+
+       memcpy(&st->regmap_bus_data[0], reg, reg_size);
+
+       ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers));
+       if (ret)
+               return ret;
+
+       memcpy(val, &st->regmap_bus_data[2], val_size);
+
+       return 0;
+}
+
+static const struct regmap_bus ad4695_regmap_bus = {
+       .write = ad4695_regmap_bus_reg_write,
+       .read = ad4695_regmap_bus_reg_read,
+       .read_flag_mask = 0x80,
+       .reg_format_endian_default = REGMAP_ENDIAN_BIG,
+       .val_format_endian_default = REGMAP_ENDIAN_BIG,
 };
 
 static const struct iio_chan_spec ad4695_channel_template = {
@@ -1061,15 +1122,14 @@ static int ad4695_probe(struct spi_device *spi)
        if (!st->chip_info)
                return -EINVAL;
 
-       /* Registers cannot be read at the max allowable speed */
-       spi->max_speed_hz = AD4695_REG_ACCESS_SCLK_HZ;
-
-       st->regmap = devm_regmap_init_spi(spi, &ad4695_regmap_config);
+       st->regmap = devm_regmap_init(dev, &ad4695_regmap_bus, st,
+                                     &ad4695_regmap_config);
        if (IS_ERR(st->regmap))
                return dev_err_probe(dev, PTR_ERR(st->regmap),
                                     "Failed to initialize regmap\n");
 
-       st->regmap16 = devm_regmap_init_spi(spi, &ad4695_regmap16_config);
+       st->regmap16 = devm_regmap_init(dev, &ad4695_regmap_bus, st,
+                                       &ad4695_regmap16_config);
        if (IS_ERR(st->regmap16))
                return dev_err_probe(dev, PTR_ERR(st->regmap16),
                                     "Failed to initialize regmap16\n");