3.4-stable patches

added patches:
	pci-enable-ari-if-dev-and-upstream-bridge-support-it-disable-otherwise.patch

diff --git a/queue-3.4/pci-enable-ari-if-dev-and-upstream-bridge-support-it-disable-otherwise.patch b/queue-3.4/pci-enable-ari-if-dev-and-upstream-bridge-support-it-disable-otherwise.patch
new file mode 100644 (file)
index 0000000..3bf0def
--- /dev/null
+++ b/queue-3.4/pci-enable-ari-if-dev-and-upstream-bridge-support-it-disable-otherwise.patch
@@ -0,0 +1,64 @@
+From b0cc6020e1cc62f1253215f189611b34be4a83c7 Mon Sep 17 00:00:00 2001
+From: Yijing Wang <wangyijing@huawei.com>
+Date: Tue, 15 Jan 2013 11:12:16 +0800
+Subject: PCI: Enable ARI if dev and upstream bridge support it; disable otherwise
+
+From: Yijing Wang <wangyijing@huawei.com>
+
+commit b0cc6020e1cc62f1253215f189611b34be4a83c7 upstream.
+
+Currently, we enable ARI in a device's upstream bridge if the bridge and
+the device support it.  But we never disable ARI, even if the device is
+removed and replaced with a device that doesn't support ARI.
+
+This means that if we hot-remove an ARI device and replace it with a
+non-ARI multi-function device, we find only function 0 of the new device
+because the upstream bridge still has ARI enabled, and next_ari_fn()
+only returns function 0 for the new non-ARI device.
+
+This patch disables ARI in the upstream bridge if the device doesn't
+support ARI.  See the PCIe spec, r3.0, sec 6.13.
+
+[bhelgaas: changelog, function comment]
+[yijing: replace PCIe Cap accessor with legacy PCI accessor]
+Signed-off-by: Yijing Wang <wangyijing@huawei.com>
+Signed-off-by: Jiang Liu <jiang.liu@huawei.com>
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+
+---
+ drivers/pci/pci.c |   14 +++++++-------
+ 1 file changed, 7 insertions(+), 7 deletions(-)
+
+--- a/drivers/pci/pci.c
++++ b/drivers/pci/pci.c
+@@ -1984,10 +1984,6 @@ void pci_enable_ari(struct pci_dev *dev)
+       if (pcie_ari_disabled || !pci_is_pcie(dev) || dev->devfn)
+               return;
+ 
+-      pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ARI);
+-      if (!pos)
+-              return;
+-
+       bridge = dev->bus->self;
+       if (!bridge || !pci_is_pcie(bridge))
+               return;
+@@ -2006,10 +2002,14 @@ void pci_enable_ari(struct pci_dev *dev)
+               return;
+ 
+       pci_read_config_word(bridge, pos + PCI_EXP_DEVCTL2, &ctrl);
+-      ctrl |= PCI_EXP_DEVCTL2_ARI;
++      if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ARI)) {
++              ctrl |= PCI_EXP_DEVCTL2_ARI;
++              bridge->ari_enabled = 1;
++      } else {
++              ctrl &= ~PCI_EXP_DEVCTL2_ARI;
++              bridge->ari_enabled = 0;
++      }
+       pci_write_config_word(bridge, pos + PCI_EXP_DEVCTL2, ctrl);
+-
+-      bridge->ari_enabled = 1;
+ }
+ 
+ /**

diff --git a/queue-3.4/series b/queue-3.4/series
index 512f993e2d44adda0d23dca34843e6d4afb60c74..b0930ed45f2194e1699c517416beb1483a43de26 100644 (file)
--- a/queue-3.4/series
+++ b/queue-3.4/series
@@ -19,3 +19,4 @@ radeon-pm-guard-access-to-rdev-pm.power_state-array.patch
 drm-radeon-skip-colorbuffer-checking-if-color_info.format-is-set-to-invalid.patch
 drm-radeon-set-the-full-cache-bit-for-fences-on-r7xx.patch
 drm-radeon-dce4-clear-bios-scratch-dpms-bit-v2.patch
+pci-enable-ari-if-dev-and-upstream-bridge-support-it-disable-otherwise.patch