sve

[AArch64] Fix +sve documentation

The documentation entry for the SVE feature incorrectly said that
it was enabled by default for ARMv8-A or later.  This patch fixes
that and also mentions that +sve implies +simd.  (It also implies
+fp, but that follows by transitivity.)

gas/
	* doc/c-aarch64.texi: Fix sve entry.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 2dd944de4f6d67de90156ad2fdc7f9664a192662..02ecf373a6242a1c20c0cbd10b31de78ebf1f555 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,7 @@
+2017-02-27  Richard Sandiford  <richard.sandiford@arm.com>
+
+       * doc/c-aarch64.texi: Fix sve entry.
+
 2017-02-27  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 
        * config/tc-aarch64.c (aarch64_features): Add rcpc.

diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index 618f30026d41dd2ad95474d827eccee078c8b7cd..59467c55f9f410284fed347ff900a0fbb7b1b863 100644 (file)
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -155,8 +155,8 @@ automatically cause those extensions to be disabled.
  @tab Enable ARMv8.1 Advanced SIMD extensions.  This implies @code{simd}.
 @item @code{simd} @tab ARMv8-A @tab ARMv8-A or later
  @tab Enable Advanced SIMD extensions.  This implies @code{fp}.
-@item @code{sve} @tab ARMv8-A @tab ARMv8-A or later
- @tab Enable the Scalable Vector Extensions.
+@item @code{sve} @tab ARMv8-A @tab No
+ @tab Enable the Scalable Vector Extensions.  This implies @code{simd}.
 @end multitable
 
 @node AArch64 Syntax