+2021-06-24 Luis Machado <luis.machado@arm.com>
+
+ * aarch64-linux-nat.c (store_cregs_to_thread)
+ (aarch64_linux_nat_target::write_capability): Update error message.
+
2021-05-24 Luis Machado <luis.machado@arm.com>
* aarch64-linux-tdep.c (aarch64_linux_cregmap): Update to match
regcache->raw_collect (regno++, &cregset.cctlr);
if (ptrace (PTRACE_SETREGSET, tid, NT_ARM_MORELLO, &iovec) < 0)
- perror_with_name (_("Unable to store capability registers."));
+ perror_with_name (_("Unable to store capability registers.\n"
+ "Please run \"sysctl cheri.ptrace_forge_cap=1\"."));
}
/* Implement the "fetch_registers" target_ops method. */
memcpy (&cap.val, buffer.data () + 1, 16);
if (!aarch64_linux_write_capability (tid, addr, cap))
- perror_with_name (_("Unable to write capability from address."));
+ perror_with_name (_("Unable to write capability to address.\n"
+ "Please run \"sysctl cheri.ptrace_forge_cap=1\"."));
return true;
}
+2021-06-24 Luis Machado <luis.machado@arm.com>
+
+ * linux-aarch64-low.cc (aarch64_target::qxfer_capability): Update
+ error message.
+
2021-03-17 Luis Machado <luis.machado@arm.com>
* linux-aarch64-low.cc (aarch64_target::qxfer_capability): Handle
if (!aarch64_linux_write_capability (tid, address, cap))
{
- warning (_("Unable to write capability to address."));
+ warning (_("Unable to write capability to address.\n"
+ "Please run \"sysctl cheri.ptrace_forge_cap=1\"."));
return 0;
}
}