Merge tag 'soc-dt-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC devicetree updates from Arnd Bergmann:
 "There are a few new variants of existing chips:

   - mt6572 is an older mobile phone chip from mediatek that was
     extremely popular a decade ago but never got upstreamed until now

   - exynos2200 is a recent high-end mobile phone chip used in a few
     Samsung phones like the Galaxy S22

   - Renesas R-Car V4M-7 (R8A779H2) is an updated version of R-Car V4M
     (R8A779H0) and used in automotive applications

   - Tegra264 is a new chip from NVIDIA, but support is fairly minimal
     for now, and not much information is public about it

  There are five more chips in a separate branch, as those are new chip
  families that I merged along with the necessary infrastructure.

  New board support is not that exciting, with a total of 33 newly added
  machines here:

   - Evaluation platforms for the chips above, plus TI am62d2 and Sophgo
     sg2042

   - Six 32-bit industrial boards based on stm32, imx6 and am33 chips,
     plus eight 64-bit rockchips rk33xx/rk35xx, am62d2, t527, imx8 and
     imx95

   - Two newly added ASPEED BMC based motherboards, and one that got
     removed

   - Phones and Tablets based on 32-bit mt6572, tegra30 and 64-bit
     msm8976 SoCs

   - Three Laptops based on Mediatek mt8186 and Qualcomm Snapdragon X1

   - A set-top box based on Amlogic meson-gxm

  Updates for existing machines are spread over all the above families.
  One notable change here is support for the RP1 I/O chip used in
  Raspberry Pi 5"

* tag 'soc-dt-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (606 commits)
  riscv: dts: sophgo: fix mdio node name for CV180X
  riscv: dts: sophgo: sophgo-srd3-10: reserve uart0 device
  riscv: dts: sophgo: add Sophgo SG2042_EVB_V2.0 board device tree
  riscv: dts: sophgo: add Sophgo SG2042_EVB_V1.X board device tree
  dt-bindings: riscv: add Sophgo SG2042_EVB_V1.X/V2.0 bindings
  riscv: dts: sophgo: add ethernet GMAC device for sg2042
  riscv: dts: sophgo: Enable ethernet device for Huashan Pi
  riscv: dts: sophgo: Add mdio multiplexer device for cv18xx
  riscv: dts: sophgo: Add ethernet device for cv18xx
  riscv: dts: sophgo: sg2044: add pmu configuration
  riscv: dts: sophgo: sg2044: add ziccrse extension
  riscv: dts: sophgo: add zfh for sg2042
  riscv: dts: sophgo: add ziccrse for sg2042
  riscv: dts: sophgo: Add xtheadvector to the sg2042 devicetree
  riscv: dts: sophgo: sg2044: add PCIe device support for SG2044
  riscv: dts: sophgo: sg2044: add MSI device support for SG2044
  riscv: dts: sophgo: add reset configuration for Sophgo CV1800 series SoC
  riscv: dts: sophgo: add reset generator for Sophgo CV1800 series SoC
  dt-bindings: soc: sophgo: Move SoCs/boards from riscv into soc, add SG2000
  riscv: dts: sophgo: sg2044: Add missing riscv,cbop-block-size property
  ...

diff --cc Documentation/devicetree/bindings/vendor-prefixes.yaml
Simple merge

diff --cc MAINTAINERS
index 6d439cda15de67fa572c2898e96798dab19b5bf5,c53dd01cd8265769cfb6b11a0181fd5fc9bd89bf..8b48d5bcce5f372a7672d7de7668790e5d25578e
--- 1/MAINTAINERS
--- 2/MAINTAINERS
+++ b/MAINTAINERS
@@@ -2358,7 -2330,7 +2358,8 @@@ F:      Documentation/devicetree/bindings/ar
  F:    Documentation/devicetree/bindings/clock/apple,nco.yaml
  F:    Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml
  F:    Documentation/devicetree/bindings/dma/apple,admac.yaml
 +F:    Documentation/devicetree/bindings/gpio/apple,smc-gpio.yaml
+ F:    Documentation/devicetree/bindings/gpu/apple,agx.yaml
  F:    Documentation/devicetree/bindings/i2c/apple,i2c.yaml
  F:    Documentation/devicetree/bindings/input/touchscreen/apple,z2-multitouch.yaml
  F:    Documentation/devicetree/bindings/interrupt-controller/apple,*

diff --cc arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi
Simple merge

diff --cc arch/arm64/boot/dts/apple/t8103.dtsi
Simple merge

diff --cc arch/arm64/boot/dts/apple/t8112.dtsi
Simple merge

diff --cc arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
Simple merge

diff --cc arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
Simple merge

diff --cc arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts
Simple merge

diff --cc arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
Simple merge

diff --cc arch/arm64/boot/dts/freescale/imx95.dtsi
Simple merge

diff --cc arch/arm64/boot/dts/freescale/s32g2.dtsi
index 4be6534ed01d2f403d44015c8c080854323e262b,da79bb9daa357d96036f44f92ad62d880614aa77..09d2fbbe1d8c4f70d756bf6507b73caa200721e8
--- 1/arch/arm64/boot/dts/freescale/s32g2.dtsi
--- 2/arch/arm64/boot/dts/freescale/s32g2.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
@@@ -376,29 -384,45 +384,68 @@@
                        status = "disabled";
                };
  
 +              usbmisc: usbmisc@44064200 {
 +                      #index-cells = <1>;
 +                      compatible = "nxp,s32g2-usbmisc";
 +                      reg = <0x44064200 0x200>;
 +              };
 +
 +              usbotg: usb@44064000 {
 +                      compatible = "nxp,s32g2-usb";
 +                      reg = <0x44064000 0x200>;
 +                      interrupt-parent = <&gic>;
 +                      interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, /* OTG Core */
 +                                       <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>; /* OTG Wakeup */
 +                      clocks = <&clks 94>, <&clks 95>;
 +                      fsl,usbmisc = <&usbmisc 0>;
 +                      ahb-burst-config = <0x3>;
 +                      tx-burst-size-dword = <0x10>;
 +                      rx-burst-size-dword = <0x10>;
 +                      phy_type = "ulpi";
 +                      dr_mode = "host";
 +                      maximum-speed = "high-speed";
 +                      status = "disabled";
 +              };
 +
+               spi0: spi@401d4000 {
+                       compatible = "nxp,s32g2-dspi";
+                       reg = <0x401d4000 0x1000>;
+                       interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clks 26>;
+                       clock-names = "dspi";
+                       spi-num-chipselects = <8>;
+                       bus-num = <0>;
+                       dmas = <&edma0 0 7>, <&edma0 0 8>;
+                       dma-names = "tx", "rx";
+                       status = "disabled";
+               };
+ 
+               spi1: spi@401d8000 {
+                       compatible = "nxp,s32g2-dspi";
+                       reg = <0x401d8000 0x1000>;
+                       interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clks 26>;
+                       clock-names = "dspi";
+                       spi-num-chipselects = <5>;
+                       bus-num = <1>;
+                       dmas = <&edma0 0 10>, <&edma0 0 11>;
+                       dma-names = "tx", "rx";
+                       status = "disabled";
+               };
+ 
+               spi2: spi@401dc000 {
+                       compatible = "nxp,s32g2-dspi";
+                       reg = <0x401dc000 0x1000>;
+                       interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clks 26>;
+                       clock-names = "dspi";
+                       spi-num-chipselects = <5>;
+                       bus-num = <2>;
+                       dmas = <&edma0 0 13>, <&edma0 0 14>;
+                       dma-names = "tx", "rx";
+                       status = "disabled";
+               };
+ 
                i2c0: i2c@401e4000 {
                        compatible = "nxp,s32g2-i2c";
                        reg = <0x401e4000 0x1000>;

diff --cc arch/arm64/boot/dts/freescale/s32g3.dtsi
index 191d2dab4254c2b8da69f0490fec766d0751c26a,9af35e82fdc9de048cc8390cf0571b0e328a2b59..39effbe8217cf9d2e203e7a5c2a9d2c8be04c09f
--- 1/arch/arm64/boot/dts/freescale/s32g3.dtsi
--- 2/arch/arm64/boot/dts/freescale/s32g3.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g3.dtsi
@@@ -435,29 -444,45 +444,68 @@@
                        status = "disabled";
                };
  
 +              usbmisc: usbmisc@44064200 {
 +                      #index-cells = <1>;
 +                      compatible = "nxp,s32g3-usbmisc";
 +                      reg = <0x44064200 0x200>;
 +              };
 +
 +                usbotg: usb@44064000 {
 +                        compatible = "nxp,s32g3-usb", "nxp,s32g2-usb";
 +                        reg = <0x44064000 0x200>;
 +                        interrupt-parent = <&gic>;
 +                        interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, /* OTG Core */
 +                                     <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>; /* OTG Wakeup */
 +                        clocks = <&clks 94>, <&clks 95>;
 +                        fsl,usbmisc = <&usbmisc 0>;
 +                        ahb-burst-config = <0x3>;
 +                        tx-burst-size-dword = <0x10>;
 +                        rx-burst-size-dword = <0x10>;
 +                        phy_type = "ulpi";
 +                        dr_mode = "host";
 +                        maximum-speed = "high-speed";
 +                        status = "disabled";
 +                };
 +
+               spi0: spi@401d4000 {
+                       compatible = "nxp,s32g3-dspi", "nxp,s32g2-dspi";
+                       reg = <0x401d4000 0x1000>;
+                       interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clks 26>;
+                       clock-names = "dspi";
+                       spi-num-chipselects = <8>;
+                       bus-num = <0>;
+                       dmas = <&edma0 0 7>, <&edma0 0 8>;
+                       dma-names = "tx", "rx";
+                       status = "disabled";
+               };
+ 
+               spi1: spi@401d8000 {
+                       compatible = "nxp,s32g3-dspi", "nxp,s32g2-dspi";
+                       reg = <0x401d8000 0x1000>;
+                       interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clks 26>;
+                       clock-names = "dspi";
+                       spi-num-chipselects = <5>;
+                       bus-num = <1>;
+                       dmas = <&edma0 0 10>, <&edma0 0 11>;
+                       dma-names = "tx", "rx";
+                       status = "disabled";
+               };
+ 
+               spi2: spi@401dc000 {
+                       compatible = "nxp,s32g3-dspi", "nxp,s32g2-dspi";
+                       reg = <0x401dc000 0x1000>;
+                       interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clks 26>;
+                       clock-names = "dspi";
+                       spi-num-chipselects = <5>;
+                       bus-num = <2>;
+                       dmas = <&edma0 0 13>, <&edma0 0 14>;
+                       dma-names = "tx", "rx";
+                       status = "disabled";
+               };
+ 
                i2c0: i2c@401e4000 {
                        compatible = "nxp,s32g3-i2c",
                                     "nxp,s32g2-i2c";

diff --cc arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts
Simple merge

diff --cc arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts
Simple merge

diff --cc arch/arm64/boot/dts/rockchip/rk3576.dtsi
Simple merge

diff --cc arch/arm64/configs/defconfig
Simple merge