aarch64: actually copy first operand in convert_bfc_to_bfm()

Commit 93562a343c ("[AArch64] PR target/20666, fix wrong encoding of
new introduced BFC pseudo") changed the destination operand to 0,
making the whole function invocation a no-op. We really want to copy
operand 0 (a register) to operand 1 (an immediate before coming here),
even if right now this likely is only a latent bug.

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 88306985a1bf0ad68608fb1d44a433763790b91e..234b58b144425aa894da297811f3faee009aac98 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2017-02-21  Jan Beulich  <jbeulich@suse.com>
+
+       * aarch64-asm.c (convert_bfc_to_bfm): Copy operand 0 to operand
+       1 (instead of to itself). Correct typo.
+
 2017-02-14  Andrew Waterman  <andrew@sifive.com>
 
        * riscv-opc.c (riscv_opcodes): Add sfence.vma instruction and

diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c
index 398af8abef71c2346ccb56019d09dd6e0dac066f..47d56f947beb1f12b14fd4f726cc97275026ee82 100644 (file)
--- a/opcodes/aarch64-asm.c
+++ b/opcodes/aarch64-asm.c
@@ -1607,10 +1607,10 @@ convert_bfc_to_bfm (aarch64_inst *inst)
   /* Insert XZR.  */
   copy_operand_info (inst, 3, 2);
   copy_operand_info (inst, 2, 1);
-  copy_operand_info (inst, 0, 0);
+  copy_operand_info (inst, 1, 0);
   inst->operands[1].reg.regno = 0x1f;
 
-  /* Convert the immedate operand.  */
+  /* Convert the immediate operand.  */
   lsb = inst->operands[2].imm.value;
   width = inst->operands[3].imm.value;
   if (inst->operands[2].qualifier == AARCH64_OPND_QLF_imm_0_31)