gpio: loongson1: use new generic GPIO chip API

Convert the driver to using the new generic GPIO chip interfaces from
linux/gpio/generic.h.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20250910-gpio-mmio-gpio-conv-part4-v2-2-f3d1a4c57124@linaro.org
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>

diff --git a/drivers/gpio/gpio-loongson1.c b/drivers/gpio/gpio-loongson1.c
index 6ca3b969db4df231517d021a7b4b5e3ddcf626f7..9750a7a175081781624a49a794926b3f1e45b4d2 100644 (file)
--- a/drivers/gpio/gpio-loongson1.c
+++ b/drivers/gpio/gpio-loongson1.c
@@ -5,10 +5,11 @@
  * Copyright (C) 2015-2023 Keguang Zhang <keguang.zhang@gmail.com>
  */
 
+#include <linux/bitops.h>
 #include <linux/module.h>
 #include <linux/gpio/driver.h>
+#include <linux/gpio/generic.h>
 #include <linux/platform_device.h>
-#include <linux/bitops.h>
 
 /* Loongson 1 GPIO Register Definitions */
 #define GPIO_CFG               0x0
@@ -17,19 +18,18 @@
 #define GPIO_OUTPUT            0x30
 
 struct ls1x_gpio_chip {
-       struct gpio_chip gc;
+       struct gpio_generic_chip chip;
        void __iomem *reg_base;
 };
 
 static int ls1x_gpio_request(struct gpio_chip *gc, unsigned int offset)
 {
        struct ls1x_gpio_chip *ls1x_gc = gpiochip_get_data(gc);
-       unsigned long flags;
 
-       raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
+       guard(gpio_generic_lock_irqsave)(&ls1x_gc->chip);
+
        __raw_writel(__raw_readl(ls1x_gc->reg_base + GPIO_CFG) | BIT(offset),
                     ls1x_gc->reg_base + GPIO_CFG);
-       raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 
        return 0;
 }
@@ -37,16 +37,16 @@ static int ls1x_gpio_request(struct gpio_chip *gc, unsigned int offset)
 static void ls1x_gpio_free(struct gpio_chip *gc, unsigned int offset)
 {
        struct ls1x_gpio_chip *ls1x_gc = gpiochip_get_data(gc);
-       unsigned long flags;
 
-       raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
+       guard(gpio_generic_lock_irqsave)(&ls1x_gc->chip);
+
        __raw_writel(__raw_readl(ls1x_gc->reg_base + GPIO_CFG) & ~BIT(offset),
                     ls1x_gc->reg_base + GPIO_CFG);
-       raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
 }
 
 static int ls1x_gpio_probe(struct platform_device *pdev)
 {
+       struct gpio_generic_chip_config config;
        struct device *dev = &pdev->dev;
        struct ls1x_gpio_chip *ls1x_gc;
        int ret;
@@ -59,29 +59,35 @@ static int ls1x_gpio_probe(struct platform_device *pdev)
        if (IS_ERR(ls1x_gc->reg_base))
                return PTR_ERR(ls1x_gc->reg_base);
 
-       ret = bgpio_init(&ls1x_gc->gc, dev, 4, ls1x_gc->reg_base + GPIO_DATA,
-                        ls1x_gc->reg_base + GPIO_OUTPUT, NULL,
-                        NULL, ls1x_gc->reg_base + GPIO_DIR, 0);
+       config = (struct gpio_generic_chip_config) {
+               .dev = dev,
+               .sz = 4,
+               .dat = ls1x_gc->reg_base + GPIO_DATA,
+               .set = ls1x_gc->reg_base + GPIO_OUTPUT,
+               .dirin = ls1x_gc->reg_base + GPIO_DIR,
+       };
+
+       ret = gpio_generic_chip_init(&ls1x_gc->chip, &config);
        if (ret)
                goto err;
 
-       ls1x_gc->gc.owner = THIS_MODULE;
-       ls1x_gc->gc.request = ls1x_gpio_request;
-       ls1x_gc->gc.free = ls1x_gpio_free;
+       ls1x_gc->chip.gc.owner = THIS_MODULE;
+       ls1x_gc->chip.gc.request = ls1x_gpio_request;
+       ls1x_gc->chip.gc.free = ls1x_gpio_free;
        /*
         * Clear ngpio to let gpiolib get the correct number
         * by reading ngpios property
         */
-       ls1x_gc->gc.ngpio = 0;
+       ls1x_gc->chip.gc.ngpio = 0;
 
-       ret = devm_gpiochip_add_data(dev, &ls1x_gc->gc, ls1x_gc);
+       ret = devm_gpiochip_add_data(dev, &ls1x_gc->chip.gc, ls1x_gc);
        if (ret)
                goto err;
 
        platform_set_drvdata(pdev, ls1x_gc);
 
        dev_info(dev, "GPIO controller registered with %d pins\n",
-                ls1x_gc->gc.ngpio);
+                ls1x_gc->chip.gc.ngpio);
 
        return 0;
 err: