usb-bdc-change-state-when-port-disconnected.patch
usb-xhci-add-xhci_spurious_success-to-asm1042-despite-being-a-v0.96-controller.patch
mtd-rawnand-marvell-use-correct-logic-for-nand-keep-config.patch
+xhci-add-quirk-to-reset-host-back-to-default-state-at-shutdown.patch
+xhci-pci-set-runtime-pm-as-default-policy-on-all-xhc-1.2-or-later-devices.patch
+xhci-remove-device-endpoints-from-bandwidth-list-when-freeing-the-device.patch
--- /dev/null
+From 34cd2db408d591bc15771cbcc90939ade0a99a21 Mon Sep 17 00:00:00 2001
+From: Mathias Nyman <mathias.nyman@linux.intel.com>
+Date: Mon, 24 Oct 2022 17:27:18 +0300
+Subject: xhci: Add quirk to reset host back to default state at shutdown
+
+From: Mathias Nyman <mathias.nyman@linux.intel.com>
+
+commit 34cd2db408d591bc15771cbcc90939ade0a99a21 upstream.
+
+Systems based on Alder Lake P see significant boot time delay if
+boot firmware tries to control usb ports in unexpected link states.
+
+This is seen with self-powered usb devices that survive in U3 link
+suspended state over S5.
+
+A more generic solution to power off ports at shutdown was attempted in
+commit 83810f84ecf1 ("xhci: turn off port power in shutdown")
+but it caused regression.
+
+Add host specific XHCI_RESET_TO_DEFAULT quirk which will reset host and
+ports back to default state in shutdown.
+
+Cc: stable@vger.kernel.org
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Link: https://lore.kernel.org/r/20221024142720.4122053-3-mathias.nyman@intel.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/usb/host/xhci-pci.c | 4 ++++
+ drivers/usb/host/xhci.c | 10 ++++++++--
+ drivers/usb/host/xhci.h | 1 +
+ 3 files changed, 13 insertions(+), 2 deletions(-)
+
+--- a/drivers/usb/host/xhci-pci.c
++++ b/drivers/usb/host/xhci-pci.c
+@@ -259,6 +259,10 @@ static void xhci_pci_quirks(struct devic
+ xhci->quirks |= XHCI_MISSING_CAS;
+
+ if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
++ pdev->device == PCI_DEVICE_ID_INTEL_ALDER_LAKE_PCH_XHCI)
++ xhci->quirks |= XHCI_RESET_TO_DEFAULT;
++
++ if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
+ (pdev->device == PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_XHCI ||
+ pdev->device == PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_XHCI ||
+ pdev->device == PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_XHCI ||
+--- a/drivers/usb/host/xhci.c
++++ b/drivers/usb/host/xhci.c
+@@ -795,9 +795,15 @@ void xhci_shutdown(struct usb_hcd *hcd)
+
+ spin_lock_irq(&xhci->lock);
+ xhci_halt(xhci);
+- /* Workaround for spurious wakeups at shutdown with HSW */
+- if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
++
++ /*
++ * Workaround for spurious wakeps at shutdown with HSW, and for boot
++ * firmware delay in ADL-P PCH if port are left in U3 at shutdown
++ */
++ if (xhci->quirks & XHCI_SPURIOUS_WAKEUP ||
++ xhci->quirks & XHCI_RESET_TO_DEFAULT)
+ xhci_reset(xhci, XHCI_RESET_SHORT_USEC);
++
+ spin_unlock_irq(&xhci->lock);
+
+ xhci_cleanup_msix(xhci);
+--- a/drivers/usb/host/xhci.h
++++ b/drivers/usb/host/xhci.h
+@@ -1904,6 +1904,7 @@ struct xhci_hcd {
+ #define XHCI_BROKEN_D3COLD BIT_ULL(41)
+ #define XHCI_EP_CTX_BROKEN_DCS BIT_ULL(42)
+ #define XHCI_SUSPEND_RESUME_CLKS BIT_ULL(43)
++#define XHCI_RESET_TO_DEFAULT BIT_ULL(44)
+
+ unsigned int num_active_eps;
+ unsigned int limit_active_eps;
--- /dev/null
+From a611bf473d1f77b70f7188b5577542cb39b4701b Mon Sep 17 00:00:00 2001
+From: Mario Limonciello <mario.limonciello@amd.com>
+Date: Mon, 24 Oct 2022 17:27:19 +0300
+Subject: xhci-pci: Set runtime PM as default policy on all xHC 1.2 or later devices
+
+From: Mario Limonciello <mario.limonciello@amd.com>
+
+commit a611bf473d1f77b70f7188b5577542cb39b4701b upstream.
+
+For optimal power consumption of USB4 routers the XHCI PCIe endpoint
+used for tunneling must be in D3. Historically this is accomplished
+by a long list of PCIe IDs that correspond to these endpoints because
+the xhci_hcd driver will not default to allowing runtime PM for all
+devices.
+
+As both AMD and Intel have released new products with new XHCI controllers
+this list continues to grow. In reviewing the XHCI specification v1.2 on
+page 607 there is already a requirement that the PCI power management
+states D3hot and D3cold must be supported.
+
+In the quirk list, use this to indicate that runtime PM should be allowed
+on XHCI controllers. The following controllers are known to be xHC 1.2 and
+dropped explicitly:
+* AMD Yellow Carp
+* Intel Alder Lake
+* Intel Meteor Lake
+* Intel Raptor Lake
+
+[keep PCI ID for Alder Lake PCH for recently added quirk -Mathias]
+
+Cc: stable@vger.kernel.org
+Suggested-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Link: https://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/extensible-host-controler-interface-usb-xhci.pdf
+Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
+Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Link: https://lore.kernel.org/r/20221024142720.4122053-4-mathias.nyman@intel.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/usb/host/xhci-pci.c | 32 ++++----------------------------
+ 1 file changed, 4 insertions(+), 28 deletions(-)
+
+--- a/drivers/usb/host/xhci-pci.c
++++ b/drivers/usb/host/xhci-pci.c
+@@ -58,25 +58,13 @@
+ #define PCI_DEVICE_ID_INTEL_CML_XHCI 0xa3af
+ #define PCI_DEVICE_ID_INTEL_TIGER_LAKE_XHCI 0x9a13
+ #define PCI_DEVICE_ID_INTEL_MAPLE_RIDGE_XHCI 0x1138
+-#define PCI_DEVICE_ID_INTEL_ALDER_LAKE_XHCI 0x461e
+-#define PCI_DEVICE_ID_INTEL_ALDER_LAKE_N_XHCI 0x464e
+-#define PCI_DEVICE_ID_INTEL_ALDER_LAKE_PCH_XHCI 0x51ed
+-#define PCI_DEVICE_ID_INTEL_RAPTOR_LAKE_XHCI 0xa71e
+-#define PCI_DEVICE_ID_INTEL_METEOR_LAKE_XHCI 0x7ec0
++#define PCI_DEVICE_ID_INTEL_ALDER_LAKE_PCH_XHCI 0x51ed
+
+ #define PCI_DEVICE_ID_AMD_RENOIR_XHCI 0x1639
+ #define PCI_DEVICE_ID_AMD_PROMONTORYA_4 0x43b9
+ #define PCI_DEVICE_ID_AMD_PROMONTORYA_3 0x43ba
+ #define PCI_DEVICE_ID_AMD_PROMONTORYA_2 0x43bb
+ #define PCI_DEVICE_ID_AMD_PROMONTORYA_1 0x43bc
+-#define PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_1 0x161a
+-#define PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_2 0x161b
+-#define PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_3 0x161d
+-#define PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_4 0x161e
+-#define PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_5 0x15d6
+-#define PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_6 0x15d7
+-#define PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_7 0x161c
+-#define PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_8 0x161f
+
+ #define PCI_DEVICE_ID_ASMEDIA_1042_XHCI 0x1042
+ #define PCI_DEVICE_ID_ASMEDIA_1042A_XHCI 0x1142
+@@ -273,12 +261,7 @@ static void xhci_pci_quirks(struct devic
+ pdev->device == PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_XHCI ||
+ pdev->device == PCI_DEVICE_ID_INTEL_ICE_LAKE_XHCI ||
+ pdev->device == PCI_DEVICE_ID_INTEL_TIGER_LAKE_XHCI ||
+- pdev->device == PCI_DEVICE_ID_INTEL_MAPLE_RIDGE_XHCI ||
+- pdev->device == PCI_DEVICE_ID_INTEL_ALDER_LAKE_XHCI ||
+- pdev->device == PCI_DEVICE_ID_INTEL_ALDER_LAKE_N_XHCI ||
+- pdev->device == PCI_DEVICE_ID_INTEL_ALDER_LAKE_PCH_XHCI ||
+- pdev->device == PCI_DEVICE_ID_INTEL_RAPTOR_LAKE_XHCI ||
+- pdev->device == PCI_DEVICE_ID_INTEL_METEOR_LAKE_XHCI))
++ pdev->device == PCI_DEVICE_ID_INTEL_MAPLE_RIDGE_XHCI))
+ xhci->quirks |= XHCI_DEFAULT_PM_RUNTIME_ALLOW;
+
+ if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
+@@ -347,15 +330,8 @@ static void xhci_pci_quirks(struct devic
+ pdev->device == PCI_DEVICE_ID_AMD_PROMONTORYA_4))
+ xhci->quirks |= XHCI_NO_SOFT_RETRY;
+
+- if (pdev->vendor == PCI_VENDOR_ID_AMD &&
+- (pdev->device == PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_1 ||
+- pdev->device == PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_2 ||
+- pdev->device == PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_3 ||
+- pdev->device == PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_4 ||
+- pdev->device == PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_5 ||
+- pdev->device == PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_6 ||
+- pdev->device == PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_7 ||
+- pdev->device == PCI_DEVICE_ID_AMD_YELLOW_CARP_XHCI_8))
++ /* xHC spec requires PCI devices to support D3hot and D3cold */
++ if (xhci->hci_version >= 0x120)
+ xhci->quirks |= XHCI_DEFAULT_PM_RUNTIME_ALLOW;
+
+ if (xhci->quirks & XHCI_RESET_ON_RESUME)
--- /dev/null
+From 5aed5b7c2430ce318a8e62f752f181e66f0d1053 Mon Sep 17 00:00:00 2001
+From: Mathias Nyman <mathias.nyman@linux.intel.com>
+Date: Mon, 24 Oct 2022 17:27:20 +0300
+Subject: xhci: Remove device endpoints from bandwidth list when freeing the device
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Mathias Nyman <mathias.nyman@linux.intel.com>
+
+commit 5aed5b7c2430ce318a8e62f752f181e66f0d1053 upstream.
+
+Endpoints are normally deleted from the bandwidth list when they are
+dropped, before the virt device is freed.
+
+If xHC host is dying or being removed then the endpoints aren't dropped
+cleanly due to functions returning early to avoid interacting with a
+non-accessible host controller.
+
+So check and delete endpoints that are still on the bandwidth list when
+freeing the virt device.
+
+Solves a list_del corruption kernel crash when unbinding xhci-pci,
+caused by xhci_mem_cleanup() when it later tried to delete already freed
+endpoints from the bandwidth list.
+
+This only affects hosts that use software bandwidth checking, which
+currenty is only the xHC in intel Panther Point PCH (Ivy Bridge)
+
+Cc: stable@vger.kernel.org
+Reported-by: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
+Tested-by: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
+Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
+Link: https://lore.kernel.org/r/20221024142720.4122053-5-mathias.nyman@intel.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/usb/host/xhci-mem.c | 20 ++++++++++++--------
+ 1 file changed, 12 insertions(+), 8 deletions(-)
+
+--- a/drivers/usb/host/xhci-mem.c
++++ b/drivers/usb/host/xhci-mem.c
+@@ -898,15 +898,19 @@ void xhci_free_virt_device(struct xhci_h
+ if (dev->eps[i].stream_info)
+ xhci_free_stream_info(xhci,
+ dev->eps[i].stream_info);
+- /* Endpoints on the TT/root port lists should have been removed
+- * when usb_disable_device() was called for the device.
+- * We can't drop them anyway, because the udev might have gone
+- * away by this point, and we can't tell what speed it was.
++ /*
++ * Endpoints are normally deleted from the bandwidth list when
++ * endpoints are dropped, before device is freed.
++ * If host is dying or being removed then endpoints aren't
++ * dropped cleanly, so delete the endpoint from list here.
++ * Only applicable for hosts with software bandwidth checking.
+ */
+- if (!list_empty(&dev->eps[i].bw_endpoint_list))
+- xhci_warn(xhci, "Slot %u endpoint %u "
+- "not removed from BW list!\n",
+- slot_id, i);
++
++ if (!list_empty(&dev->eps[i].bw_endpoint_list)) {
++ list_del_init(&dev->eps[i].bw_endpoint_list);
++ xhci_dbg(xhci, "Slot %u endpoint %u not removed from BW list!\n",
++ slot_id, i);
++ }
+ }
+ /* If this is a hub, free the TT(s) from the TT list */
+ xhci_free_tt_info(xhci, dev, slot_id);
projects / thirdparty / kernel / stable-queue.git / commitdiff
