]> git.ipfire.org Git - people/ms/gcc.git/commitdiff
Daily bump.
authorGCC Administrator <gccadmin@gcc.gnu.org>
Sat, 3 Sep 2022 00:19:30 +0000 (00:19 +0000)
committerGCC Administrator <gccadmin@gcc.gnu.org>
Sat, 3 Sep 2022 00:19:30 +0000 (00:19 +0000)
gcc/ChangeLog
gcc/DATESTAMP

index 109fc2122d3d15c9d37827e964f7905a04d38302..a424a18b42d4e385aef3903a94334fb763689345 100644 (file)
@@ -1,3 +1,36 @@
+2022-09-02  Richard Earnshaw  <rearnsha@arm.com>
+
+       Backported from master:
+       2022-08-03  Richard Earnshaw  <rearnsha@arm.com>
+
+       PR rtl-optimization/106187
+       * alias.h (mems_same_for_tbaa_p): Declare.
+       * alias.c (mems_same_for_tbaa_p): New function.
+       * dse.c (record_store): Use it instead of open-coding
+       alias check.
+       * cselib.h (cselib_redundant_set_p): Declare.
+       * cselib.c: Include alias.h
+       (cselib_redundant_set_p): New function.
+       * cfgcleanup.c: (mark_effect): Use cselib_redundant_set_p instead
+       of rtx_equal_for_cselib_p.
+       * postreload.c (reload_cse_simplify): Use cselib_redundant_set_p.
+       (reload_cse_noop_set_p): Delete.
+
+2022-09-02  Richard Earnshaw  <rearnsha@arm.com>
+
+       Backported from master:
+       2022-05-13  Richard Earnshaw  <rearnsha@arm.com>
+
+       PR target/105463
+       * config/arm/mve.md (*movmisalign<mode>_mve_store): Use
+       mve_memory_operand.
+       (*movmisalign<mode>_mve_load): Likewise.
+       * config/arm/vec-common.md (movmisalign<mode>): Convert to generator
+       form...
+       (@movmisalign<mode>): ... thus.  Use generic predicates and then
+       rework operands if they are not valid.  For MVE rework to a
+       narrower element size if the alignment is not high enough.
+
 2022-08-30  Peter Bergner  <bergner@linux.ibm.com>
 
        Backported from master:
index 9dafb9722d0132124979768702e4b588d723ef52..e15744dd99e9641058efa7fb0a127d5bd5718d46 100644 (file)
@@ -1 +1 @@
-20220902
+20220903