--- /dev/null
+From fe6872adb05e85bde38f2cdec01a0f4cfb826998 Mon Sep 17 00:00:00 2001
+From: Yifan Zhang <yifan1.zhang@amd.com>
+Date: Thu, 8 Dec 2022 11:55:15 +0800
+Subject: drm/amd/display: Add DCN314 display SG Support
+
+From: Yifan Zhang <yifan1.zhang@amd.com>
+
+commit fe6872adb05e85bde38f2cdec01a0f4cfb826998 upstream.
+
+Add display SG support for DCN 3.1.4.
+
+Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+@@ -1511,6 +1511,7 @@ static int amdgpu_dm_init(struct amdgpu_
+ case IP_VERSION(3, 0, 1):
+ case IP_VERSION(3, 1, 2):
+ case IP_VERSION(3, 1, 3):
++ case IP_VERSION(3, 1, 4):
+ case IP_VERSION(3, 1, 5):
+ case IP_VERSION(3, 1, 6):
+ init_data.flags.gpu_vm_support = true;
--- /dev/null
+From 592cd24a08763975c75be850a7d4e461bfd353bf Mon Sep 17 00:00:00 2001
+From: Evan Quan <evan.quan@amd.com>
+Date: Fri, 9 Dec 2022 16:05:12 +0800
+Subject: drm/amd/pm: add missing SMU13.0.0 mm_dpm feature mapping
+
+From: Evan Quan <evan.quan@amd.com>
+
+commit 592cd24a08763975c75be850a7d4e461bfd353bf upstream.
+
+Without this, the pp_dpm_vclk and pp_dpm_dclk outputs are not with
+correct data.
+
+Signed-off-by: Evan Quan <evan.quan@amd.com>
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org # 6.0.x
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
++++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+@@ -187,6 +187,8 @@ static struct cmn2asic_mapping smu_v13_0
+ FEA_MAP(MEM_TEMP_READ),
+ FEA_MAP(ATHUB_MMHUB_PG),
+ FEA_MAP(SOC_PCC),
++ [SMU_FEATURE_DPM_VCLK_BIT] = {1, FEATURE_MM_DPM_BIT},
++ [SMU_FEATURE_DPM_DCLK_BIT] = {1, FEATURE_MM_DPM_BIT},
+ };
+
+ static struct cmn2asic_mapping smu_v13_0_0_table_map[SMU_TABLE_COUNT] = {
--- /dev/null
+From e0607c10ebf551a654c3577fc74b4bf5533e1cea Mon Sep 17 00:00:00 2001
+From: Evan Quan <evan.quan@amd.com>
+Date: Fri, 9 Dec 2022 16:09:58 +0800
+Subject: drm/amd/pm: add missing SMU13.0.7 mm_dpm feature mapping
+
+From: Evan Quan <evan.quan@amd.com>
+
+commit e0607c10ebf551a654c3577fc74b4bf5533e1cea upstream.
+
+Without this, the pp_dpm_vclk and pp_dpm_dclk outputs are not with
+correct data.
+
+Signed-off-by: Evan Quan <evan.quan@amd.com>
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org # 6.0.x
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
++++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
+@@ -189,6 +189,8 @@ static struct cmn2asic_mapping smu_v13_0
+ FEA_MAP(MEM_TEMP_READ),
+ FEA_MAP(ATHUB_MMHUB_PG),
+ FEA_MAP(SOC_PCC),
++ [SMU_FEATURE_DPM_VCLK_BIT] = {1, FEATURE_MM_DPM_BIT},
++ [SMU_FEATURE_DPM_DCLK_BIT] = {1, FEATURE_MM_DPM_BIT},
+ };
+
+ static struct cmn2asic_mapping smu_v13_0_7_table_map[SMU_TABLE_COUNT] = {
--- /dev/null
+From 272b981416f8be0180c4d8066f90635fa7c1c501 Mon Sep 17 00:00:00 2001
+From: Evan Quan <evan.quan@amd.com>
+Date: Thu, 15 Dec 2022 13:38:46 +0800
+Subject: drm/amd/pm: bump SMU13.0.0 driver_if header to version 0x34
+
+From: Evan Quan <evan.quan@amd.com>
+
+commit 272b981416f8be0180c4d8066f90635fa7c1c501 upstream.
+
+To fit the latest PMFW and suppress the warning emerged on driver loading.
+
+Signed-off-by: Evan Quan <evan.quan@amd.com>
+Acked-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org # 6.0, 6.1
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_0.h | 2 +-
+ drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h | 1 +
+ drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 2 ++
+ 3 files changed, 4 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_0.h
++++ b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_0.h
+@@ -522,9 +522,9 @@ typedef enum {
+ TEMP_HOTSPOT_M,
+ TEMP_MEM,
+ TEMP_VR_GFX,
++ TEMP_VR_SOC,
+ TEMP_VR_MEM0,
+ TEMP_VR_MEM1,
+- TEMP_VR_SOC,
+ TEMP_VR_U,
+ TEMP_LIQUID0,
+ TEMP_LIQUID1,
+--- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
++++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
+@@ -28,6 +28,7 @@
+ #define SMU13_DRIVER_IF_VERSION_INV 0xFFFFFFFF
+ #define SMU13_DRIVER_IF_VERSION_YELLOW_CARP 0x04
+ #define SMU13_DRIVER_IF_VERSION_ALDE 0x08
++#define SMU13_DRIVER_IF_VERSION_SMU_V13_0_0_0 0x34
+ #define SMU13_DRIVER_IF_VERSION_SMU_V13_0_4 0x07
+ #define SMU13_DRIVER_IF_VERSION_SMU_V13_0_5 0x04
+ #define SMU13_DRIVER_IF_VERSION_SMU_V13_0_0_10 0x32
+--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
++++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
+@@ -288,6 +288,8 @@ int smu_v13_0_check_fw_version(struct sm
+ smu->smc_driver_if_version = SMU13_DRIVER_IF_VERSION_ALDE;
+ break;
+ case IP_VERSION(13, 0, 0):
++ smu->smc_driver_if_version = SMU13_DRIVER_IF_VERSION_SMU_V13_0_0_0;
++ break;
+ case IP_VERSION(13, 0, 10):
+ smu->smc_driver_if_version = SMU13_DRIVER_IF_VERSION_SMU_V13_0_0_10;
+ break;
--- /dev/null
+From e73fc71e8f015d61f3adca7659cb209fd5117aa5 Mon Sep 17 00:00:00 2001
+From: Evan Quan <evan.quan@amd.com>
+Date: Fri, 16 Dec 2022 17:04:24 +0800
+Subject: drm/amd/pm: correct the fan speed retrieving in PWM for some SMU13 asics
+
+From: Evan Quan <evan.quan@amd.com>
+
+commit e73fc71e8f015d61f3adca7659cb209fd5117aa5 upstream.
+
+For SMU 13.0.0 and 13.0.7, the output from PMFW is in percent. Driver
+need to convert that into correct PMW(255) based.
+
+Signed-off-by: Evan Quan <evan.quan@amd.com>
+Acked-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org # 6.0, 6.1
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 17 ++++++++++++++---
+ drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 17 ++++++++++++++---
+ 2 files changed, 28 insertions(+), 6 deletions(-)
+
+--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
++++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+@@ -1417,12 +1417,23 @@ out:
+ static int smu_v13_0_0_get_fan_speed_pwm(struct smu_context *smu,
+ uint32_t *speed)
+ {
++ int ret;
++
+ if (!speed)
+ return -EINVAL;
+
+- return smu_v13_0_0_get_smu_metrics_data(smu,
+- METRICS_CURR_FANPWM,
+- speed);
++ ret = smu_v13_0_0_get_smu_metrics_data(smu,
++ METRICS_CURR_FANPWM,
++ speed);
++ if (ret) {
++ dev_err(smu->adev->dev, "Failed to get fan speed(PWM)!");
++ return ret;
++ }
++
++ /* Convert the PMFW output which is in percent to pwm(255) based */
++ *speed = MIN(*speed * 255 / 100, 255);
++
++ return 0;
+ }
+
+ static int smu_v13_0_0_get_fan_speed_rpm(struct smu_context *smu,
+--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
++++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
+@@ -1361,12 +1361,23 @@ static int smu_v13_0_7_populate_umd_stat
+ static int smu_v13_0_7_get_fan_speed_pwm(struct smu_context *smu,
+ uint32_t *speed)
+ {
++ int ret;
++
+ if (!speed)
+ return -EINVAL;
+
+- return smu_v13_0_7_get_smu_metrics_data(smu,
+- METRICS_CURR_FANPWM,
+- speed);
++ ret = smu_v13_0_7_get_smu_metrics_data(smu,
++ METRICS_CURR_FANPWM,
++ speed);
++ if (ret) {
++ dev_err(smu->adev->dev, "Failed to get fan speed(PWM)!");
++ return ret;
++ }
++
++ /* Convert the PMFW output which is in percent to pwm(255) based */
++ *speed = MIN(*speed * 255 / 100, 255);
++
++ return 0;
+ }
+
+ static int smu_v13_0_7_get_fan_speed_rpm(struct smu_context *smu,
--- /dev/null
+From 1d4624cd72b912b2680c08d0be48338a1629a858 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Mon, 21 Nov 2022 15:52:19 -0500
+Subject: drm/amdgpu: handle polaris10/11 overlap asics (v2)
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit 1d4624cd72b912b2680c08d0be48338a1629a858 upstream.
+
+Some special polaris 10 chips overlap with the polaris11
+DID range. Handle this properly in the driver.
+
+v2: use local flags for other function calls.
+
+Acked-by: Luben Tuikov <luben.tuikov@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 13 +++++++++++--
+ 1 file changed, 11 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+@@ -2025,6 +2025,15 @@ static int amdgpu_pci_probe(struct pci_d
+ "See modparam exp_hw_support\n");
+ return -ENODEV;
+ }
++ /* differentiate between P10 and P11 asics with the same DID */
++ if (pdev->device == 0x67FF &&
++ (pdev->revision == 0xE3 ||
++ pdev->revision == 0xE7 ||
++ pdev->revision == 0xF3 ||
++ pdev->revision == 0xF7)) {
++ flags &= ~AMD_ASIC_MASK;
++ flags |= CHIP_POLARIS10;
++ }
+
+ /* Due to hardware bugs, S/G Display on raven requires a 1:1 IOMMU mapping,
+ * however, SME requires an indirect IOMMU mapping because the encryption
+@@ -2094,12 +2103,12 @@ static int amdgpu_pci_probe(struct pci_d
+
+ pci_set_drvdata(pdev, ddev);
+
+- ret = amdgpu_driver_load_kms(adev, ent->driver_data);
++ ret = amdgpu_driver_load_kms(adev, flags);
+ if (ret)
+ goto err_pci;
+
+ retry_init:
+- ret = drm_dev_register(ddev, ent->driver_data);
++ ret = drm_dev_register(ddev, flags);
+ if (ret == -EAGAIN && ++retry <= 3) {
+ DRM_INFO("retry init %d\n", retry);
+ /* Don't request EX mode too frequently which is attacking */
--- /dev/null
+From 81d0bcf9900932633d270d5bc4a54ff599c6ebdb Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Wed, 7 Dec 2022 11:08:53 -0500
+Subject: drm/amdgpu: make display pinning more flexible (v2)
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit 81d0bcf9900932633d270d5bc4a54ff599c6ebdb upstream.
+
+Only apply the static threshold for Stoney and Carrizo.
+This hardware has certain requirements that don't allow
+mixing of GTT and VRAM. Newer asics do not have these
+requirements so we should be able to be more flexible
+with where buffers end up.
+
+Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2270
+Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2291
+Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2255
+Acked-by: Luben Tuikov <luben.tuikov@amd.com>
+Reviewed-by: Christian König <christian.koenig@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+@@ -1506,7 +1506,8 @@ u64 amdgpu_bo_gpu_offset_no_check(struct
+ uint32_t amdgpu_bo_get_preferred_domain(struct amdgpu_device *adev,
+ uint32_t domain)
+ {
+- if (domain == (AMDGPU_GEM_DOMAIN_VRAM | AMDGPU_GEM_DOMAIN_GTT)) {
++ if ((domain == (AMDGPU_GEM_DOMAIN_VRAM | AMDGPU_GEM_DOMAIN_GTT)) &&
++ ((adev->asic_type == CHIP_CARRIZO) || (adev->asic_type == CHIP_STONEY))) {
+ domain = AMDGPU_GEM_DOMAIN_VRAM;
+ if (adev->gmc.real_vram_size <= AMDGPU_SG_THRESHOLD)
+ domain = AMDGPU_GEM_DOMAIN_GTT;
--- /dev/null
+From 3f882f2d4f689627c1566c2c92087bc3ff734953 Mon Sep 17 00:00:00 2001
+From: Matthew Auld <matthew.auld@intel.com>
+Date: Fri, 16 Dec 2022 11:34:56 +0000
+Subject: drm/i915: improve the catch-all evict to handle lock contention
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Matthew Auld <matthew.auld@intel.com>
+
+commit 3f882f2d4f689627c1566c2c92087bc3ff734953 upstream.
+
+The catch-all evict can fail due to object lock contention, since it
+only goes as far as trylocking the object, due to us already holding the
+vm->mutex. Doing a full object lock here can deadlock, since the
+vm->mutex is always our inner lock. Add another execbuf pass which drops
+the vm->mutex and then tries to grab the object will the full lock,
+before then retrying the eviction. This should be good enough for now to
+fix the immediate regression with userspace seeing -ENOSPC from execbuf
+due to contended object locks during GTT eviction.
+
+v2 (Mani)
+ - Also revamp the docs for the different passes.
+
+Testcase: igt@gem_ppgtt@shrink-vs-evict-*
+Fixes: 7e00897be8bf ("drm/i915: Add object locking to i915_gem_evict_for_node and i915_gem_evict_something, v2.")
+References: https://gitlab.freedesktop.org/drm/intel/-/issues/7627
+References: https://gitlab.freedesktop.org/drm/intel/-/issues/7570
+References: https://bugzilla.mozilla.org/show_bug.cgi?id=1779558
+Signed-off-by: Matthew Auld <matthew.auld@intel.com>
+Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
+Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
+Cc: Andrzej Hajda <andrzej.hajda@intel.com>
+Cc: Mani Milani <mani@chromium.org>
+Cc: <stable@vger.kernel.org> # v5.18+
+Reviewed-by: Mani Milani <mani@chromium.org>
+Tested-by: Mani Milani <mani@chromium.org>
+Link: https://patchwork.freedesktop.org/patch/msgid/20221216113456.414183-1-matthew.auld@intel.com
+(cherry picked from commit 801fa7a81f6da533cc5442fc40e32c72b76cd42a)
+Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 59 +++++++++++++++++++-----
+ drivers/gpu/drm/i915/gem/i915_gem_mman.c | 2
+ drivers/gpu/drm/i915/i915_gem_evict.c | 37 ++++++++++-----
+ drivers/gpu/drm/i915/i915_gem_evict.h | 4 +
+ drivers/gpu/drm/i915/i915_vma.c | 2
+ drivers/gpu/drm/i915/selftests/i915_gem_evict.c | 4 -
+ 6 files changed, 82 insertions(+), 26 deletions(-)
+
+--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
++++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+@@ -729,32 +729,69 @@ static int eb_reserve(struct i915_execbu
+ bool unpinned;
+
+ /*
+- * Attempt to pin all of the buffers into the GTT.
+- * This is done in 2 phases:
++ * We have one more buffers that we couldn't bind, which could be due to
++ * various reasons. To resolve this we have 4 passes, with every next
++ * level turning the screws tighter:
+ *
+- * 1. Unbind all objects that do not match the GTT constraints for
+- * the execbuffer (fenceable, mappable, alignment etc).
+- * 2. Bind new objects.
++ * 0. Unbind all objects that do not match the GTT constraints for the
++ * execbuffer (fenceable, mappable, alignment etc). Bind all new
++ * objects. This avoids unnecessary unbinding of later objects in order
++ * to make room for the earlier objects *unless* we need to defragment.
+ *
+- * This avoid unnecessary unbinding of later objects in order to make
+- * room for the earlier objects *unless* we need to defragment.
++ * 1. Reorder the buffers, where objects with the most restrictive
++ * placement requirements go first (ignoring fixed location buffers for
++ * now). For example, objects needing the mappable aperture (the first
++ * 256M of GTT), should go first vs objects that can be placed just
++ * about anywhere. Repeat the previous pass.
+ *
+- * Defragmenting is skipped if all objects are pinned at a fixed location.
++ * 2. Consider buffers that are pinned at a fixed location. Also try to
++ * evict the entire VM this time, leaving only objects that we were
++ * unable to lock. Try again to bind the buffers. (still using the new
++ * buffer order).
++ *
++ * 3. We likely have object lock contention for one or more stubborn
++ * objects in the VM, for which we need to evict to make forward
++ * progress (perhaps we are fighting the shrinker?). When evicting the
++ * VM this time around, anything that we can't lock we now track using
++ * the busy_bo, using the full lock (after dropping the vm->mutex to
++ * prevent deadlocks), instead of trylock. We then continue to evict the
++ * VM, this time with the stubborn object locked, which we can now
++ * hopefully unbind (if still bound in the VM). Repeat until the VM is
++ * evicted. Finally we should be able bind everything.
+ */
+- for (pass = 0; pass <= 2; pass++) {
++ for (pass = 0; pass <= 3; pass++) {
+ int pin_flags = PIN_USER | PIN_VALIDATE;
+
+ if (pass == 0)
+ pin_flags |= PIN_NONBLOCK;
+
+ if (pass >= 1)
+- unpinned = eb_unbind(eb, pass == 2);
++ unpinned = eb_unbind(eb, pass >= 2);
+
+ if (pass == 2) {
+ err = mutex_lock_interruptible(&eb->context->vm->mutex);
+ if (!err) {
+- err = i915_gem_evict_vm(eb->context->vm, &eb->ww);
++ err = i915_gem_evict_vm(eb->context->vm, &eb->ww, NULL);
++ mutex_unlock(&eb->context->vm->mutex);
++ }
++ if (err)
++ return err;
++ }
++
++ if (pass == 3) {
++retry:
++ err = mutex_lock_interruptible(&eb->context->vm->mutex);
++ if (!err) {
++ struct drm_i915_gem_object *busy_bo = NULL;
++
++ err = i915_gem_evict_vm(eb->context->vm, &eb->ww, &busy_bo);
+ mutex_unlock(&eb->context->vm->mutex);
++ if (err && busy_bo) {
++ err = i915_gem_object_lock(busy_bo, &eb->ww);
++ i915_gem_object_put(busy_bo);
++ if (!err)
++ goto retry;
++ }
+ }
+ if (err)
+ return err;
+--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
++++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+@@ -369,7 +369,7 @@ retry:
+ if (vma == ERR_PTR(-ENOSPC)) {
+ ret = mutex_lock_interruptible(&ggtt->vm.mutex);
+ if (!ret) {
+- ret = i915_gem_evict_vm(&ggtt->vm, &ww);
++ ret = i915_gem_evict_vm(&ggtt->vm, &ww, NULL);
+ mutex_unlock(&ggtt->vm.mutex);
+ }
+ if (ret)
+--- a/drivers/gpu/drm/i915/i915_gem_evict.c
++++ b/drivers/gpu/drm/i915/i915_gem_evict.c
+@@ -416,6 +416,11 @@ int i915_gem_evict_for_node(struct i915_
+ * @vm: Address space to cleanse
+ * @ww: An optional struct i915_gem_ww_ctx. If not NULL, i915_gem_evict_vm
+ * will be able to evict vma's locked by the ww as well.
++ * @busy_bo: Optional pointer to struct drm_i915_gem_object. If not NULL, then
++ * in the event i915_gem_evict_vm() is unable to trylock an object for eviction,
++ * then @busy_bo will point to it. -EBUSY is also returned. The caller must drop
++ * the vm->mutex, before trying again to acquire the contended lock. The caller
++ * also owns a reference to the object.
+ *
+ * This function evicts all vmas from a vm.
+ *
+@@ -425,7 +430,8 @@ int i915_gem_evict_for_node(struct i915_
+ * To clarify: This is for freeing up virtual address space, not for freeing
+ * memory in e.g. the shrinker.
+ */
+-int i915_gem_evict_vm(struct i915_address_space *vm, struct i915_gem_ww_ctx *ww)
++int i915_gem_evict_vm(struct i915_address_space *vm, struct i915_gem_ww_ctx *ww,
++ struct drm_i915_gem_object **busy_bo)
+ {
+ int ret = 0;
+
+@@ -457,15 +463,22 @@ int i915_gem_evict_vm(struct i915_addres
+ * the resv is shared among multiple objects, we still
+ * need the object ref.
+ */
+- if (dying_vma(vma) ||
++ if (!i915_gem_object_get_rcu(vma->obj) ||
+ (ww && (dma_resv_locking_ctx(vma->obj->base.resv) == &ww->ctx))) {
+ __i915_vma_pin(vma);
+ list_add(&vma->evict_link, &locked_eviction_list);
+ continue;
+ }
+
+- if (!i915_gem_object_trylock(vma->obj, ww))
++ if (!i915_gem_object_trylock(vma->obj, ww)) {
++ if (busy_bo) {
++ *busy_bo = vma->obj; /* holds ref */
++ ret = -EBUSY;
++ break;
++ }
++ i915_gem_object_put(vma->obj);
+ continue;
++ }
+
+ __i915_vma_pin(vma);
+ list_add(&vma->evict_link, &eviction_list);
+@@ -473,25 +486,29 @@ int i915_gem_evict_vm(struct i915_addres
+ if (list_empty(&eviction_list) && list_empty(&locked_eviction_list))
+ break;
+
+- ret = 0;
+ /* Unbind locked objects first, before unlocking the eviction_list */
+ list_for_each_entry_safe(vma, vn, &locked_eviction_list, evict_link) {
+ __i915_vma_unpin(vma);
+
+- if (ret == 0)
++ if (ret == 0) {
+ ret = __i915_vma_unbind(vma);
+- if (ret != -EINTR) /* "Get me out of here!" */
+- ret = 0;
++ if (ret != -EINTR) /* "Get me out of here!" */
++ ret = 0;
++ }
++ if (!dying_vma(vma))
++ i915_gem_object_put(vma->obj);
+ }
+
+ list_for_each_entry_safe(vma, vn, &eviction_list, evict_link) {
+ __i915_vma_unpin(vma);
+- if (ret == 0)
++ if (ret == 0) {
+ ret = __i915_vma_unbind(vma);
+- if (ret != -EINTR) /* "Get me out of here!" */
+- ret = 0;
++ if (ret != -EINTR) /* "Get me out of here!" */
++ ret = 0;
++ }
+
+ i915_gem_object_unlock(vma->obj);
++ i915_gem_object_put(vma->obj);
+ }
+ } while (ret == 0);
+
+--- a/drivers/gpu/drm/i915/i915_gem_evict.h
++++ b/drivers/gpu/drm/i915/i915_gem_evict.h
+@@ -11,6 +11,7 @@
+ struct drm_mm_node;
+ struct i915_address_space;
+ struct i915_gem_ww_ctx;
++struct drm_i915_gem_object;
+
+ int __must_check i915_gem_evict_something(struct i915_address_space *vm,
+ struct i915_gem_ww_ctx *ww,
+@@ -23,6 +24,7 @@ int __must_check i915_gem_evict_for_node
+ struct drm_mm_node *node,
+ unsigned int flags);
+ int i915_gem_evict_vm(struct i915_address_space *vm,
+- struct i915_gem_ww_ctx *ww);
++ struct i915_gem_ww_ctx *ww,
++ struct drm_i915_gem_object **busy_bo);
+
+ #endif /* __I915_GEM_EVICT_H__ */
+--- a/drivers/gpu/drm/i915/i915_vma.c
++++ b/drivers/gpu/drm/i915/i915_vma.c
+@@ -1569,7 +1569,7 @@ static int __i915_ggtt_pin(struct i915_v
+ * locked objects when called from execbuf when pinning
+ * is removed. This would probably regress badly.
+ */
+- i915_gem_evict_vm(vm, NULL);
++ i915_gem_evict_vm(vm, NULL, NULL);
+ mutex_unlock(&vm->mutex);
+ }
+ } while (1);
+--- a/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
++++ b/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
+@@ -344,7 +344,7 @@ static int igt_evict_vm(void *arg)
+
+ /* Everything is pinned, nothing should happen */
+ mutex_lock(&ggtt->vm.mutex);
+- err = i915_gem_evict_vm(&ggtt->vm, NULL);
++ err = i915_gem_evict_vm(&ggtt->vm, NULL, NULL);
+ mutex_unlock(&ggtt->vm.mutex);
+ if (err) {
+ pr_err("i915_gem_evict_vm on a full GGTT returned err=%d]\n",
+@@ -356,7 +356,7 @@ static int igt_evict_vm(void *arg)
+
+ for_i915_gem_ww(&ww, err, false) {
+ mutex_lock(&ggtt->vm.mutex);
+- err = i915_gem_evict_vm(&ggtt->vm, &ww);
++ err = i915_gem_evict_vm(&ggtt->vm, &ww, NULL);
+ mutex_unlock(&ggtt->vm.mutex);
+ }
+
--- /dev/null
+From 31a2e6cbe8a4eb0d1650fff4b77872b744e14a62 Mon Sep 17 00:00:00 2001
+From: Chris Wilson <chris.p.wilson@intel.com>
+Date: Fri, 2 Dec 2022 12:28:42 +0000
+Subject: drm/i915/migrate: Account for the reserved_space
+
+From: Chris Wilson <chris.p.wilson@intel.com>
+
+commit 31a2e6cbe8a4eb0d1650fff4b77872b744e14a62 upstream.
+
+If the ring is nearly full when calling into emit_pte(), we might
+incorrectly trample the reserved_space when constructing the packet to
+emit the PTEs. This then triggers the GEM_BUG_ON(rq->reserved_space >
+ring->space) when later submitting the request, since the request itself
+doesn't have enough space left in the ring to emit things like
+workarounds, breadcrumbs etc.
+
+v2: Fix the whitespace errors
+
+Testcase: igt@i915_selftests@live_emit_pte_full_ring
+Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/7535
+Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6889
+Fixes: cf586021642d ("drm/i915/gt: Pipelined page migration")
+Signed-off-by: Chris Wilson <chris.p.wilson@intel.com>
+Signed-off-by: Matthew Auld <matthew.auld@intel.com>
+Cc: Andrzej Hajda <andrzej.hajda@intel.com>
+Cc: Andi Shyti <andi.shyti@linux.intel.com>
+Cc: Nirmoy Das <nirmoy.das@intel.com>
+Cc: <stable@vger.kernel.org> # v5.15+
+Tested-by: Nirmoy Das <nirmoy.das@intel.com>
+Reviewed-by: Nirmoy Das <nirmoy.das@intel.com>
+Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com>
+Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20221202122844.428006-1-matthew.auld@intel.com
+(cherry picked from commit 35168a6c4ed53db4f786858bac23b1474fd7d0dc)
+Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/i915/gt/intel_migrate.c | 16 ++++++++++++----
+ 1 file changed, 12 insertions(+), 4 deletions(-)
+
+--- a/drivers/gpu/drm/i915/gt/intel_migrate.c
++++ b/drivers/gpu/drm/i915/gt/intel_migrate.c
+@@ -341,6 +341,16 @@ static int emit_no_arbitration(struct i9
+ return 0;
+ }
+
++static int max_pte_pkt_size(struct i915_request *rq, int pkt)
++{
++ struct intel_ring *ring = rq->ring;
++
++ pkt = min_t(int, pkt, (ring->space - rq->reserved_space) / sizeof(u32) + 5);
++ pkt = min_t(int, pkt, (ring->size - ring->emit) / sizeof(u32) + 5);
++
++ return pkt;
++}
++
+ static int emit_pte(struct i915_request *rq,
+ struct sgt_dma *it,
+ enum i915_cache_level cache_level,
+@@ -387,8 +397,7 @@ static int emit_pte(struct i915_request
+ return PTR_ERR(cs);
+
+ /* Pack as many PTE updates as possible into a single MI command */
+- pkt = min_t(int, dword_length, ring->space / sizeof(u32) + 5);
+- pkt = min_t(int, pkt, (ring->size - ring->emit) / sizeof(u32) + 5);
++ pkt = max_pte_pkt_size(rq, dword_length);
+
+ hdr = cs;
+ *cs++ = MI_STORE_DATA_IMM | REG_BIT(21); /* as qword elements */
+@@ -421,8 +430,7 @@ static int emit_pte(struct i915_request
+ }
+ }
+
+- pkt = min_t(int, dword_rem, ring->space / sizeof(u32) + 5);
+- pkt = min_t(int, pkt, (ring->size - ring->emit) / sizeof(u32) + 5);
++ pkt = max_pte_pkt_size(rq, dword_rem);
+
+ hdr = cs;
+ *cs++ = MI_STORE_DATA_IMM | REG_BIT(21);
--- /dev/null
+From ad0fca2dceeab8fdd8e1135f4b4ef2dc46c2ead9 Mon Sep 17 00:00:00 2001
+From: Matthew Auld <matthew.auld@intel.com>
+Date: Mon, 12 Dec 2022 17:19:58 +0000
+Subject: drm/i915/ttm: consider CCS for backup objects
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Matthew Auld <matthew.auld@intel.com>
+
+commit ad0fca2dceeab8fdd8e1135f4b4ef2dc46c2ead9 upstream.
+
+It seems we can have one or more framebuffers that are still pinned when
+suspending lmem, in such a case we end up creating a shmem backup
+object, instead of evicting the object directly, but this will skip
+copying the CCS aux state, since we don't allocate the extra storage for
+the CCS pages as part of the ttm_tt construction. Since we can already
+deal with pinned objects just fine, it doesn't seem too nasty to just
+extend to support dealing with the CCS aux state, if the object is a
+pinned framebuffer. This fixes display corruption (like in gnome-shell)
+seen on DG2 when returning from suspend.
+
+Fixes: da0595ae91da ("drm/i915/migrate: Evict and restore the flatccs capable lmem obj")
+Signed-off-by: Matthew Auld <matthew.auld@intel.com>
+Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Cc: Nirmoy Das <nirmoy.das@intel.com>
+Cc: Andrzej Hajda <andrzej.hajda@intel.com>
+Cc: Shuicheng Lin <shuicheng.lin@intel.com>
+Cc: <stable@vger.kernel.org> # v5.19+
+Tested-by: Nirmoy Das <nirmoy.das@intel.com>
+Reviewed-by: Nirmoy Das <nirmoy.das@intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20221212171958.82593-2-matthew.auld@intel.com
+(cherry picked from commit 95df9cc24bee8a09d39c62bcef4319b984814e18)
+Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/i915/gem/i915_gem_object.c | 3 +++
+ drivers/gpu/drm/i915/gem/i915_gem_object_types.h | 10 ++++++----
+ drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c | 18 +++++++++++++++++-
+ 3 files changed, 26 insertions(+), 5 deletions(-)
+
+--- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
++++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
+@@ -726,6 +726,9 @@ bool i915_gem_object_needs_ccs_pages(str
+ if (!HAS_FLAT_CCS(to_i915(obj->base.dev)))
+ return false;
+
++ if (obj->flags & I915_BO_ALLOC_CCS_AUX)
++ return true;
++
+ for (i = 0; i < obj->mm.n_placements; i++) {
+ /* Compression is not allowed for the objects with smem placement */
+ if (obj->mm.placements[i]->type == INTEL_MEMORY_SYSTEM)
+--- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
++++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
+@@ -325,16 +325,18 @@ struct drm_i915_gem_object {
+ * dealing with userspace objects the CPU fault handler is free to ignore this.
+ */
+ #define I915_BO_ALLOC_GPU_ONLY BIT(6)
++#define I915_BO_ALLOC_CCS_AUX BIT(7)
+ #define I915_BO_ALLOC_FLAGS (I915_BO_ALLOC_CONTIGUOUS | \
+ I915_BO_ALLOC_VOLATILE | \
+ I915_BO_ALLOC_CPU_CLEAR | \
+ I915_BO_ALLOC_USER | \
+ I915_BO_ALLOC_PM_VOLATILE | \
+ I915_BO_ALLOC_PM_EARLY | \
+- I915_BO_ALLOC_GPU_ONLY)
+-#define I915_BO_READONLY BIT(7)
+-#define I915_TILING_QUIRK_BIT 8 /* unknown swizzling; do not release! */
+-#define I915_BO_PROTECTED BIT(9)
++ I915_BO_ALLOC_GPU_ONLY | \
++ I915_BO_ALLOC_CCS_AUX)
++#define I915_BO_READONLY BIT(8)
++#define I915_TILING_QUIRK_BIT 9 /* unknown swizzling; do not release! */
++#define I915_BO_PROTECTED BIT(10)
+ /**
+ * @mem_flags - Mutable placement-related flags
+ *
+--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c
++++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c
+@@ -50,6 +50,7 @@ static int i915_ttm_backup(struct i915_g
+ container_of(bo->bdev, typeof(*i915), bdev);
+ struct drm_i915_gem_object *backup;
+ struct ttm_operation_ctx ctx = {};
++ unsigned int flags;
+ int err = 0;
+
+ if (bo->resource->mem_type == I915_PL_SYSTEM || obj->ttm.backup)
+@@ -65,7 +66,22 @@ static int i915_ttm_backup(struct i915_g
+ if (obj->flags & I915_BO_ALLOC_PM_VOLATILE)
+ return 0;
+
+- backup = i915_gem_object_create_shmem(i915, obj->base.size);
++ /*
++ * It seems that we might have some framebuffers still pinned at this
++ * stage, but for such objects we might also need to deal with the CCS
++ * aux state. Make sure we force the save/restore of the CCS state,
++ * otherwise we might observe display corruption, when returning from
++ * suspend.
++ */
++ flags = 0;
++ if (i915_gem_object_needs_ccs_pages(obj)) {
++ WARN_ON_ONCE(!i915_gem_object_is_framebuffer(obj));
++ WARN_ON_ONCE(!pm_apply->allow_gpu);
++
++ flags = I915_BO_ALLOC_CCS_AUX;
++ }
++ backup = i915_gem_object_create_region(i915->mm.regions[INTEL_REGION_SMEM],
++ obj->base.size, 0, flags);
+ if (IS_ERR(backup))
+ return PTR_ERR(backup);
+
ext4-initialize-quota-before-expanding-inode-in-setproject-ioctl.patch
ext4-avoid-unaccounted-block-allocation-when-expanding-inode.patch
ext4-allocate-extended-attribute-value-in-vmalloc-area.patch
+drm-i915-ttm-consider-ccs-for-backup-objects.patch
+drm-amd-display-add-dcn314-display-sg-support.patch
+drm-amdgpu-handle-polaris10-11-overlap-asics-v2.patch
+drm-amdgpu-make-display-pinning-more-flexible-v2.patch
+drm-i915-improve-the-catch-all-evict-to-handle-lock-contention.patch
+drm-i915-migrate-account-for-the-reserved_space.patch
+drm-amd-pm-add-missing-smu13.0.0-mm_dpm-feature-mapping.patch
+drm-amd-pm-add-missing-smu13.0.7-mm_dpm-feature-mapping.patch
+drm-amd-pm-bump-smu13.0.0-driver_if-header-to-version-0x34.patch
+drm-amd-pm-correct-the-fan-speed-retrieving-in-pwm-for-some-smu13-asics.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
