]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
wifi: ath12k: Add hw_params to remap CE register space for IPQ5332
authorBalamurugan S <quic_bselvara@quicinc.com>
Fri, 21 Mar 2025 10:52:43 +0000 (16:22 +0530)
committerJeff Johnson <jeff.johnson@oss.qualcomm.com>
Tue, 25 Mar 2025 14:55:44 +0000 (07:55 -0700)
For IPQ5332 CE register space is moved out of WCSS region and the
space is not contiguous. Hence, add hardware params (ce_ie_addr &
ce_remap) for IPQ5332. These parameters would be used by Ath12k
AHB driver (in subsequent patches) to remap the CE registers to a
new space for accessing them.

Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.3.1-00130-QCAHKSWPL_SILICONZ-1
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.1.1-00210-QCAHKSWPL_SILICONZ-1

Signed-off-by: Balamurugan S <quic_bselvara@quicinc.com>
Co-developed-by: P Praneesh <quic_ppranees@quicinc.com>
Signed-off-by: P Praneesh <quic_ppranees@quicinc.com>
Reviewed-by: Vasanthakumar Thiagarajan <vasanthakumar.thiagarajan@oss.qualcomm.com>
Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
Link: https://patch.msgid.link/20250321-ath12k-ahb-v12-6-bb389ed76ae5@quicinc.com
Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com>
drivers/net/wireless/ath/ath12k/ce.h
drivers/net/wireless/ath/ath12k/core.h
drivers/net/wireless/ath/ath12k/hal.h
drivers/net/wireless/ath/ath12k/hw.c
drivers/net/wireless/ath/ath12k/hw.h

index 8007a94cec5d3f465fdc8fefc5fc534515053c8a..57f75899ee03d63479698011fc081936677f8698 100644 (file)
@@ -76,6 +76,17 @@ struct ce_pipe_config {
        __le32 reserved;
 };
 
+struct ce_ie_addr {
+       u32 ie1_reg_addr;
+       u32 ie2_reg_addr;
+       u32 ie3_reg_addr;
+};
+
+struct ce_remap {
+       u32 base;
+       u32 size;
+};
+
 struct ce_attr {
        /* CE_ATTR_* values */
        unsigned int flags;
index c1927a328831f441d8eb2dc2b7871102e70d1bcf..b080870b39a05812916b9859c5e9df9fcc79534d 100644 (file)
@@ -924,6 +924,10 @@ struct ath12k_base {
        void __iomem *mem;
        unsigned long mem_len;
 
+       void __iomem *mem_ce;
+       u32 ce_remap_base_addr;
+       bool ce_remap;
+
        struct {
                enum ath12k_bus bus;
                const struct ath12k_hif_ops *ops;
index 1ce97f9a92ac57e0dbc28682a3d7e57c9891a5ac..47ff0b1bfdf48915426dc79ebcde15d8d47dde7b 100644 (file)
@@ -11,6 +11,7 @@
 #include "rx_desc.h"
 
 struct ath12k_base;
+#define HAL_CE_REMAP_REG_BASE  (ab->ce_remap_base_addr)
 
 #define HAL_LINK_DESC_SIZE                     (32 << 2)
 #define HAL_LINK_DESC_ALIGN                    128
@@ -372,6 +373,9 @@ struct ath12k_base;
  * ath12k_hal_rx_desc_get_err().
  */
 
+#define HAL_IPQ5332_CE_WFSS_REG_BASE   0x740000
+#define HAL_IPQ5332_CE_SIZE            0x100000
+
 enum hal_srng_ring_id {
        HAL_SRNG_RING_ID_REO2SW0 = 0,
        HAL_SRNG_RING_ID_REO2SW1,
index 84f542c02c94e9382ce884e97243237ef34010b7..91aecca566a4b3b3927f019c4b0b66e2663ce975 100644 (file)
@@ -1110,10 +1110,14 @@ static const struct ath12k_hw_regs ipq5332_regs = {
        .hal_ppe_rel_ring_base = 0x0000046c,
 
        /* CE address */
-       .hal_umac_ce0_src_reg_base = 0x00740000,
-       .hal_umac_ce0_dest_reg_base = 0x00741000,
-       .hal_umac_ce1_src_reg_base = 0x00742000,
-       .hal_umac_ce1_dest_reg_base = 0x00743000,
+       .hal_umac_ce0_src_reg_base = 0x00740000 -
+               HAL_IPQ5332_CE_WFSS_REG_BASE,
+       .hal_umac_ce0_dest_reg_base = 0x00741000 -
+               HAL_IPQ5332_CE_WFSS_REG_BASE,
+       .hal_umac_ce1_src_reg_base = 0x00742000 -
+               HAL_IPQ5332_CE_WFSS_REG_BASE,
+       .hal_umac_ce1_dest_reg_base = 0x00743000 -
+               HAL_IPQ5332_CE_WFSS_REG_BASE,
 };
 
 static const struct ath12k_hw_regs wcn7850_regs = {
@@ -1227,6 +1231,17 @@ static const struct ath12k_hw_hal_params ath12k_hw_hal_params_ipq5332 = {
                            HAL_WBM_SW_COOKIE_CONV_CFG_WBM2SW4_EN,
 };
 
+static const struct ce_ie_addr ath12k_ce_ie_addr_ipq5332 = {
+       .ie1_reg_addr = CE_HOST_IE_ADDRESS - HAL_IPQ5332_CE_WFSS_REG_BASE,
+       .ie2_reg_addr = CE_HOST_IE_2_ADDRESS - HAL_IPQ5332_CE_WFSS_REG_BASE,
+       .ie3_reg_addr = CE_HOST_IE_3_ADDRESS - HAL_IPQ5332_CE_WFSS_REG_BASE,
+};
+
+static const struct ce_remap ath12k_ce_remap_ipq5332 = {
+       .base = HAL_IPQ5332_CE_WFSS_REG_BASE,
+       .size = HAL_IPQ5332_CE_SIZE,
+};
+
 static const struct ath12k_hw_params ath12k_hw_params[] = {
        {
                .name = "qcn9274 hw1.0",
@@ -1304,6 +1319,9 @@ static const struct ath12k_hw_params ath12k_hw_params[] = {
                .iova_mask = 0,
 
                .supports_aspm = false,
+
+               .ce_ie_addr = NULL,
+               .ce_remap = NULL,
        },
        {
                .name = "wcn7850 hw2.0",
@@ -1385,6 +1403,9 @@ static const struct ath12k_hw_params ath12k_hw_params[] = {
                .iova_mask = ATH12K_PCIE_MAX_PAYLOAD_SIZE - 1,
 
                .supports_aspm = true,
+
+               .ce_ie_addr = NULL,
+               .ce_remap = NULL,
        },
        {
                .name = "qcn9274 hw2.0",
@@ -1462,6 +1483,9 @@ static const struct ath12k_hw_params ath12k_hw_params[] = {
                .iova_mask = 0,
 
                .supports_aspm = false,
+
+               .ce_ie_addr = NULL,
+               .ce_remap = NULL,
        },
        {
                .name = "ipq5332 hw1.0",
@@ -1534,6 +1558,9 @@ static const struct ath12k_hw_params ath12k_hw_params[] = {
                .supports_dynamic_smps_6ghz = false,
                .iova_mask = 0,
                .supports_aspm = false,
+
+               .ce_ie_addr = &ath12k_ce_ie_addr_ipq5332,
+               .ce_remap = &ath12k_ce_remap_ipq5332,
        },
 };
 
index fbe1aec475ceb14cc7d6090e3d203620f3b7c516..6a75af093f319364f5930830c0c15e50906b9f78 100644 (file)
@@ -226,6 +226,9 @@ struct ath12k_hw_params {
        bool supports_dynamic_smps_6ghz;
 
        u32 iova_mask;
+
+       const struct ce_ie_addr *ce_ie_addr;
+       const struct ce_remap *ce_remap;
 };
 
 struct ath12k_hw_ops {