x86/Intel: correct VFPCLASSP{S,D} handling when displacement is present

fits_in_disp8() can be called before ambiguous operands get resolved
or rejected (in process_suffix()), which requires that i.memshift be
non-negative to avoid an internal error. This case wasn't covered by
6c0946d0d28d ("x86: correct VFPCLASSP{S,D} operand size handling").

diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 98c0bf0fe91dc29d8b22d858e1531f1f0dc00b1a..66a2e0f8e0a67f61fd56cba46826944831b0474d 100644 (file)
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -6327,7 +6327,7 @@ check_VecOperands (const insn_template *t)
        i.memshift = t->opcode_modifier.disp8memshift;
       else
        {
-         const i386_operand_type *type = NULL;
+         const i386_operand_type *type = NULL, *fallback = NULL;
 
          i.memshift = 0;
          for (op = 0; op < i.operands; op++)
@@ -6341,6 +6341,8 @@ check_VecOperands (const insn_template *t)
                  type = &t->operand_types[op];
                else if (!i.types[op].bitfield.unspecified)
                  type = &i.types[op];
+               else /* Ambiguities get resolved elsewhere.  */
+                 fallback = &t->operand_types[op];
              }
            else if (i.types[op].bitfield.class == RegSIMD
                     && t->opcode_modifier.evex != EVEXLIG)
@@ -6353,6 +6355,8 @@ check_VecOperands (const insn_template *t)
                  i.memshift = 4;
              }
 
+         if (!type && !i.memshift)
+           type = fallback;
          if (type)
            {
              if (type->bitfield.zmmword)

diff --git a/gas/testsuite/gas/i386/avx512dq-inval.s b/gas/testsuite/gas/i386/avx512dq-inval.s
index 36ee3b8221e481946b644b786cdb94269d41962a..d47ae54199a7e45c6f431f6392fb2f2c5bfebefa 100644 (file)
--- a/gas/testsuite/gas/i386/avx512dq-inval.s
+++ b/gas/testsuite/gas/i386/avx512dq-inval.s
@@ -24,7 +24,7 @@ _start:
        vcvtuqq2ps      xmm0, [rax]
 
        vfpclasspd      k0, [eax], 0
-       vfpclassps      k0, [eax], 0
+       vfpclassps      k0, [eax+1], 0
 
        .att_syntax prefix
 

diff --git a/gas/testsuite/gas/i386/noavx512-2.l b/gas/testsuite/gas/i386/noavx512-2.l
index 56d1aaafaece2f1d8eb88e01e36477c098614d18..7bc4502618d4433aeb13113fb8ae662befc49383 100644 (file)
--- a/gas/testsuite/gas/i386/noavx512-2.l
+++ b/gas/testsuite/gas/i386/noavx512-2.l
@@ -104,7 +104,7 @@ GAS LISTING .*
 [      ]*[1-9][0-9]*[  ]+\.intel_syntax noprefix
 [      ]*[1-9][0-9]*[  ]+\?\?\?\? 62F3FD48             vfpclasspd k0, \[eax], 0
 [      ]*[1-9][0-9]*[  ]+660000
-[      ]*[1-9][0-9]*[  ]+\?\?\?\? 62F37D48             vfpclassps k0, \[eax], 0
-[      ]*[1-9][0-9]*[  ]+660000
+[      ]*[1-9][0-9]*[  ]+\?\?\?\? 62F37D48             vfpclassps k0, \[eax\+0x80], 0
+[      ]*[1-9][0-9]*[  ]+66400200 ?
 [      ]*[1-9][0-9]*[  ]+
 #pass

diff --git a/gas/testsuite/gas/i386/noavx512-2.s b/gas/testsuite/gas/i386/noavx512-2.s
index 437dc045a9f0ed377c98506849d4f6f48bd87698..d974bcf9df5f6b6b791f4c540f4f70522ecf19db 100644 (file)
--- a/gas/testsuite/gas/i386/noavx512-2.s
+++ b/gas/testsuite/gas/i386/noavx512-2.s
@@ -52,6 +52,6 @@
 
        .intel_syntax noprefix
        vfpclasspd k0, [eax], 0
-       vfpclassps k0, [eax], 0
+       vfpclassps k0, [eax+0x80], 0
 
        .p2align 4