--- /dev/null
+From 5822d6da5a8c21f3bdd471fdf0f84d675a041917 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Thu, 22 May 2025 15:51:30 +0100
+Subject: spi: spi-fsl-dspi: restrict register range for regmap access
+
+From: Larisa Grigore <larisa.grigore@nxp.com>
+
+[ Upstream commit 283ae0c65e9c592f4a1ba4f31917f5e766da7f31 ]
+
+DSPI registers are NOT continuous, some registers are reserved and
+accessing them from userspace will trigger external abort, add regmap
+register access table to avoid below abort.
+
+ For example on S32G:
+
+ # cat /sys/kernel/debug/regmap/401d8000.spi/registers
+
+ Internal error: synchronous external abort: 96000210 1 PREEMPT SMP
+ ...
+ Call trace:
+ regmap_mmio_read32le+0x24/0x48
+ regmap_mmio_read+0x48/0x70
+ _regmap_bus_reg_read+0x38/0x48
+ _regmap_read+0x68/0x1b0
+ regmap_read+0x50/0x78
+ regmap_read_debugfs+0x120/0x338
+
+Fixes: 1acbdeb92c87 ("spi/fsl-dspi: Convert to use regmap and add big-endian support")
+Co-developed-by: Xulin Sun <xulin.sun@windriver.com>
+Signed-off-by: Xulin Sun <xulin.sun@windriver.com>
+Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com>
+Signed-off-by: James Clark <james.clark@linaro.org>
+Link: https://patch.msgid.link/20250522-james-nxp-spi-v2-1-bea884630cfb@linaro.org
+Signed-off-by: Mark Brown <broonie@kernel.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/spi/spi-fsl-dspi.c | 20 +++++++++++++++++++-
+ 1 file changed, 19 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c
+index 351b2989db071..1d94fc89602f2 100644
+--- a/drivers/spi/spi-fsl-dspi.c
++++ b/drivers/spi/spi-fsl-dspi.c
+@@ -1,7 +1,7 @@
+ // SPDX-License-Identifier: GPL-2.0+
+ //
+ // Copyright 2013 Freescale Semiconductor, Inc.
+-// Copyright 2020 NXP
++// Copyright 2020-2025 NXP
+ //
+ // Freescale DSPI driver
+ // This file contains a driver for the Freescale DSPI
+@@ -946,6 +946,20 @@ static int dspi_resume(struct device *dev)
+
+ static SIMPLE_DEV_PM_OPS(dspi_pm, dspi_suspend, dspi_resume);
+
++static const struct regmap_range dspi_yes_ranges[] = {
++ regmap_reg_range(SPI_MCR, SPI_MCR),
++ regmap_reg_range(SPI_TCR, SPI_CTAR(3)),
++ regmap_reg_range(SPI_SR, SPI_TXFR3),
++ regmap_reg_range(SPI_RXFR0, SPI_RXFR3),
++ regmap_reg_range(SPI_CTARE(0), SPI_CTARE(3)),
++ regmap_reg_range(SPI_SREX, SPI_SREX),
++};
++
++static const struct regmap_access_table dspi_access_table = {
++ .yes_ranges = dspi_yes_ranges,
++ .n_yes_ranges = ARRAY_SIZE(dspi_yes_ranges),
++};
++
+ static const struct regmap_range dspi_volatile_ranges[] = {
+ regmap_reg_range(SPI_MCR, SPI_TCR),
+ regmap_reg_range(SPI_SR, SPI_SR),
+@@ -963,6 +977,8 @@ static const struct regmap_config dspi_regmap_config = {
+ .reg_stride = 4,
+ .max_register = 0x88,
+ .volatile_table = &dspi_volatile_table,
++ .rd_table = &dspi_access_table,
++ .wr_table = &dspi_access_table,
+ };
+
+ static const struct regmap_range dspi_xspi_volatile_ranges[] = {
+@@ -984,6 +1000,8 @@ static const struct regmap_config dspi_xspi_regmap_config[] = {
+ .reg_stride = 4,
+ .max_register = 0x13c,
+ .volatile_table = &dspi_xspi_volatile_table,
++ .rd_table = &dspi_access_table,
++ .wr_table = &dspi_access_table,
+ },
+ {
+ .name = "pushr",
+--
+2.39.5
+